diff options
| author | Nogah Frankel <nogahf@mellanox.com> | 2016-09-20 11:16:56 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-09-21 01:00:59 -0400 |
| commit | 274df7fb77fffd243336c6affa2f9469e8f11122 (patch) | |
| tree | 119138c01c26cff7d09c55929f23fe2345c334cd /drivers/net/ethernet/mellanox/mlxsw | |
| parent | e44d49cbbc5fb1a310b71212acc4e1f378a8fd91 (diff) | |
| download | op-kernel-dev-274df7fb77fffd243336c6affa2f9469e8f11122.zip op-kernel-dev-274df7fb77fffd243336c6affa2f9469e8f11122.tar.gz | |
mlxsw: pci: Add max router interface resource
Add the max number of rif (router interfaces) to resource query.
Signed-off-by: Nogah Frankel <nogahf@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/core.h | 4 | ||||
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/pci.c | 5 |
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h index 097e560..c4f550b 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core.h +++ b/drivers/net/ethernet/mellanox/mlxsw/core.h @@ -276,7 +276,8 @@ struct mlxsw_resources { max_virtual_routers_valid:1, max_system_ports_valid:1, max_vlan_groups_valid:1, - max_regions_valid:1; + max_regions_valid:1, + max_rif_valid:1; u8 max_span; u8 max_lag; u8 max_ports_in_lag; @@ -287,6 +288,7 @@ struct mlxsw_resources { u16 max_system_ports; u16 max_vlan_groups; u16 max_regions; + u16 max_rif; /* Internal resources. * Determined by the SW, not queried from the HW. diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c index 826b502..e742bd4 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.c +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c @@ -1165,6 +1165,7 @@ mlxsw_pci_config_profile_swid_config(struct mlxsw_pci *mlxsw_pci, #define MLXSW_MAX_SYSTEM_PORT_ID 0x2502 #define MLXSW_MAX_VLAN_GROUPS_ID 0x2906 #define MLXSW_MAX_REGIONS_ID 0x2901 +#define MLXSW_MAX_RIF_ID 0x2C02 #define MLXSW_RESOURCES_QUERY_MAX_QUERIES 100 #define MLXSW_RESOURCES_PER_QUERY 32 @@ -1212,6 +1213,10 @@ static void mlxsw_pci_resources_query_parse(int id, u64 val, resources->max_regions = val; resources->max_regions_valid = 1; break; + case MLXSW_MAX_RIF_ID: + resources->max_rif = val; + resources->max_rif_valid = 1; + break; default: break; } |
