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authorIlan Tayari <ilant@mellanox.com>2017-03-27 14:48:38 +0300
committerSaeed Mahameed <saeedm@mellanox.com>2017-06-27 16:36:47 +0300
commit537a50574175a2b68b0612ffb48cb044a394c7b4 (patch)
tree29826dcec1702cf2e1c2e82752e971a7f727d055 /drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c
parent6062118d5cd2b90369278cdf831aeffb84ae3943 (diff)
downloadop-kernel-dev-537a50574175a2b68b0612ffb48cb044a394c7b4.zip
op-kernel-dev-537a50574175a2b68b0612ffb48cb044a394c7b4.tar.gz
net/mlx5: FPGA, Add high-speed connection routines
An FPGA high-speed connection has two endpoints, an FPGA QP and a ConnectX QP. Add library routines to create and connect the endpoints of an FPGA high-speed connection. These routines allow creating and interacting with both types of connections: Shell and Sandbox Unit (SBU). Shell connection provides an interface to the FPGA's address space, which includes the configuration space and the DDR. Use of the shell connection will be introduced in a later patchset. SBU connection provides a command and/or data interface to the application-specific logic within the FPGA. Use of the SBU connection will be introduced in a later patch in this patchset. Some struct definitions are added to a new header file sdk.h, which will be extended in later patches in the patchset. This header file will contain the in-kernel FPGA client driver API. Signed-off-by: Ilan Tayari <ilant@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c
index c3bb4b8..7f859a3 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c
@@ -37,6 +37,7 @@
#include "mlx5_core.h"
#include "lib/mlx5.h"
#include "fpga/core.h"
+#include "fpga/conn.h"
static const char *const mlx5_fpga_error_strings[] = {
"Null Syndrome",
@@ -127,7 +128,17 @@ int mlx5_fpga_device_start(struct mlx5_core_dev *mdev)
max_num_qps = MLX5_CAP_FPGA(mdev, shell_caps.max_num_qps);
err = mlx5_core_reserve_gids(mdev, max_num_qps);
+ if (err)
+ goto out;
+
+ err = mlx5_fpga_conn_device_init(fdev);
+ if (err)
+ goto err_rsvd_gid;
+
+ goto out;
+err_rsvd_gid:
+ mlx5_core_unreserve_gids(mdev, max_num_qps);
out:
spin_lock_irqsave(&fdev->state_lock, flags);
fdev->state = err ? MLX5_FPGA_STATUS_FAILURE : MLX5_FPGA_STATUS_SUCCESS;
@@ -173,6 +184,7 @@ void mlx5_fpga_device_stop(struct mlx5_core_dev *mdev)
fdev->state = MLX5_FPGA_STATUS_NONE;
spin_unlock_irqrestore(&fdev->state_lock, flags);
+ mlx5_fpga_conn_device_cleanup(fdev);
max_num_qps = MLX5_CAP_FPGA(mdev, shell_caps.max_num_qps);
mlx5_core_unreserve_gids(mdev, max_num_qps);
}
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