diff options
| author | Saeed Mahameed <saeedm@mellanox.com> | 2014-10-27 11:37:40 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-10-28 17:18:00 -0400 |
| commit | 2c762679435dc812b7031ef9a839b901827294a9 (patch) | |
| tree | 7ec39fbec5cc5a01e940f9bfd57de61eeff91806 /drivers/net/ethernet/mellanox/mlx4/en_port.h | |
| parent | dcf972a334dd76975bf144ca57350c1f3132c947 (diff) | |
| download | op-kernel-dev-2c762679435dc812b7031ef9a839b901827294a9.zip op-kernel-dev-2c762679435dc812b7031ef9a839b901827294a9.tar.gz | |
net/mlx4_en: Use PTYS register to query ethtool settings
- If dev cap MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL is ON, query PTYS register to fill ethtool settings.
else use default values.
- Use autoneg port cap and dev backplane autoneg cap to reprort autoneg interface capbilities.
- Fix typo in mlx4_en_port_state struct field (transciver to transceiver).
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Amir Vadai <amirv@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx4/en_port.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/en_port.h | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_port.h b/drivers/net/ethernet/mellanox/mlx4/en_port.h index a5fc93b..040da4b 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_port.h +++ b/drivers/net/ethernet/mellanox/mlx4/en_port.h @@ -53,6 +53,28 @@ enum { MLX4_MCAST_ENABLE = 2, }; +enum mlx4_link_mode { + MLX4_1000BASE_CX_SGMII = 0, + MLX4_1000BASE_KX = 1, + MLX4_10GBASE_CX4 = 2, + MLX4_10GBASE_KX4 = 3, + MLX4_10GBASE_KR = 4, + MLX4_20GBASE_KR2 = 5, + MLX4_40GBASE_CR4 = 6, + MLX4_40GBASE_KR4 = 7, + MLX4_56GBASE_KR4 = 8, + MLX4_10GBASE_CR = 12, + MLX4_10GBASE_SR = 13, + MLX4_40GBASE_SR4 = 15, + MLX4_56GBASE_CR4 = 17, + MLX4_56GBASE_SR4 = 18, + MLX4_100BASE_TX = 24, + MLX4_1000BASE_T = 25, + MLX4_10GBASE_T = 26, +}; + +#define MLX4_PROT_MASK(link_mode) (1<<link_mode) + enum { MLX4_EN_100M_SPEED = 0x04, MLX4_EN_10G_SPEED_XAUI = 0x00, @@ -67,7 +89,9 @@ enum { struct mlx4_en_query_port_context { u8 link_up; #define MLX4_EN_LINK_UP_MASK 0x80 - u8 reserved; +#define MLX4_EN_ANC_MASK 0x40 + u8 autoneg; +#define MLX4_EN_AUTONEG_MASK 0x80 __be16 mtu; u8 reserved2; u8 link_speed; |
