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| author | Divy Le Ray <divy@chelsio.com> | 2009-03-12 21:13:59 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-03-13 11:30:44 -0700 |
| commit | b2b964f0647c5156038834dd879f90442e33f2a5 (patch) | |
| tree | e6eb3bbd6dc3e3e5fb3684350ef64574b10162bf /drivers/net/cxgb3 | |
| parent | 8f4358044d7d694f2e0c18a6ce5db6ec0790451a (diff) | |
| download | op-kernel-dev-b2b964f0647c5156038834dd879f90442e33f2a5.zip op-kernel-dev-b2b964f0647c5156038834dd879f90442e33f2a5.tar.gz | |
cxgb3: prefetch buffer access in GRO mode
Elmininate a cache miss when accessing the CPL header within
the first aggregated buffer.
Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb3')
| -rw-r--r-- | drivers/net/cxgb3/sge.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c index 90f6f82..a482429 100644 --- a/drivers/net/cxgb3/sge.c +++ b/drivers/net/cxgb3/sge.c @@ -2029,6 +2029,8 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs, pci_unmap_single(adap->pdev, pci_unmap_addr(sd, dma_addr), fl->buf_size, PCI_DMA_FROMDEVICE); + prefetch(&qs->lro_frag_tbl); + rx_frag += nr_frags; rx_frag->page = sd->pg_chunk.page; rx_frag->page_offset = sd->pg_chunk.offset + offset; @@ -2997,6 +2999,7 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports, V_NEWTIMER(q->rspq.holdoff_tmr)); mod_timer(&q->tx_reclaim_timer, jiffies + TX_RECLAIM_PERIOD); + return 0; err_unlock: |
