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authorMichael Chan <mchan@broadcom.com>2008-01-29 21:35:40 -0800
committerDavid S. Miller <davem@davemloft.net>2008-01-31 19:27:15 -0800
commit62a8313cddbea04f2a28d1d76acf317c2a56cfae (patch)
treefc4f14124044b98b417df64b607386e24e0789c4 /drivers/net/bnx2.h
parent2726d6e126c0c16efeba30356d4ae105f1854d1e (diff)
downloadop-kernel-dev-62a8313cddbea04f2a28d1d76acf317c2a56cfae.zip
op-kernel-dev-62a8313cddbea04f2a28d1d76acf317c2a56cfae.tar.gz
[BNX2]: Remove CTX_WR macro.
The CTX_WR macro is unnecessary and obfuscates the code. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/bnx2.h')
-rw-r--r--drivers/net/bnx2.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index fb3c019..c5fe340 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6814,13 +6814,6 @@ struct bnx2 {
#define REG_WR16(bp, offset, val) \
writew(val, bp->regview + offset)
-/* Indirect context access. Unlike the MBQ_WR, these macros will not
- * trigger a chip event. */
-static void bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val);
-
-#define CTX_WR(bp, cid_addr, offset, val) \
- bnx2_ctx_wr(bp, cid_addr, offset, val)
-
struct cpu_reg {
u32 mode;
u32 mode_value_halt;
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