diff options
| author | Mike Dunn <mikedunn@newsguy.com> | 2012-04-25 12:06:10 -0700 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-05-13 23:12:41 -0500 |
| commit | e2788c98b98269a3131bffd2b57599280d7abd73 (patch) | |
| tree | 9c2ae016d1a388485a1d1ff2941bc6fa9f3d17a8 /drivers/mtd | |
| parent | 3f91e94f7f511de74c0d2abe08672ccdbdd1961c (diff) | |
| download | op-kernel-dev-e2788c98b98269a3131bffd2b57599280d7abd73.zip op-kernel-dev-e2788c98b98269a3131bffd2b57599280d7abd73.tar.gz | |
mtd: nand: add sanity check of ecc strength to nand_scan_tail()
This patch adds sanity checks that ensure that drivers for controllers with
hardware ECC set the 'strength' element in struct nand_ecc_ctrl. Also stylistic
changes to the line that calculates strength for software ECC.
This v2 simplifies the check. Thanks Brian!¹
¹ http://lists.infradead.org/pipermail/linux-mtd/2012-April/040890.html
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 8718eaf..9f5d339 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -3348,8 +3348,13 @@ int nand_scan_tail(struct mtd_info *mtd) if (!chip->ecc.write_oob) chip->ecc.write_oob = nand_write_oob_syndrome; - if (mtd->writesize >= chip->ecc.size) + if (mtd->writesize >= chip->ecc.size) { + if (!chip->ecc.strength) { + pr_warn("Driver must set ecc.strength when using hardware ECC\n"); + BUG(); + } break; + } pr_warn("%d byte HW ECC not possible on " "%d byte page size, fallback to SW ECC\n", chip->ecc.size, mtd->writesize); @@ -3404,7 +3409,7 @@ int nand_scan_tail(struct mtd_info *mtd) BUG(); } chip->ecc.strength = - chip->ecc.bytes*8 / fls(8*chip->ecc.size); + chip->ecc.bytes * 8 / fls(8 * chip->ecc.size); break; case NAND_ECC_NONE: |
