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authorSteven A. Falco <sfalco@harris.com>2009-06-26 12:42:47 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-06-26 18:15:21 +0100
commit89bb871e96cdc3d78b7f69f0bacc94b21bbaccfd (patch)
tree8a310ff9be87b211268bfcfd9ab71ebc746ed1f6 /drivers/mtd
parentae27a7ab2c74f9c075e03730c5f493163d048c62 (diff)
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op-kernel-dev-89bb871e96cdc3d78b7f69f0bacc94b21bbaccfd.tar.gz
mtd: m25p80 timeout too short for worst-case m25p16 devices
The m25p16 data sheet from numonyx lists the worst-case bulk erase time (tBE) as 40 seconds. Signed-off-by: Steven A. Falco <sfalco@harris.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/devices/m25p80.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 59c4612..ae5fe91 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -54,7 +54,7 @@
#define SR_SRWD 0x80 /* SR write protect */
/* Define max times to check status register before we give up. */
-#define MAX_READY_WAIT_JIFFIES (10 * HZ) /* eg. M25P128 specs 6s max sector erase */
+#define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */
#define CMD_SIZE 4
#ifdef CONFIG_M25PXX_USE_FAST_READ
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