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authorEric Benard <ebenard@eukrea.com>2009-06-29 13:58:01 +0200
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-09-19 13:11:51 -0700
commit71b7d0d90d536ae4e70929cc59a1a9f6ba457c6c (patch)
treebd2b653811d1971f8cdd00daab2f1a1beb58488c /drivers/mtd
parent64da392ab08a88ad83f4c3f60283711ee090c9ef (diff)
downloadop-kernel-dev-71b7d0d90d536ae4e70929cc59a1a9f6ba457c6c.zip
op-kernel-dev-71b7d0d90d536ae4e70929cc59a1a9f6ba457c6c.tar.gz
mtd: mxc_nand: fix 2KiB pagesize NAND on i.MX27
This patch allows i.MX27 to support 2KiB pagesize NAND flash. We are using a 1.8V NAND flash which datasheet (unfortunately only available under NDA) says : Page size: x8: 2,112 bytes (2,048 + 64 bytes). Without this patch, all sectors are marked as bad eraseblock. Signed-off-by: Eric Benard <ebenard@eukrea.com> Acked-by : Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/mxc_nand.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 76beea4..65b26d5 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -857,6 +857,17 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
}
}
+/* Define some generic bad / good block scan pattern which are used
+ * while scanning a device for factory marked good / bad blocks. */
+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
+
+static struct nand_bbt_descr smallpage_memorybased = {
+ .options = NAND_BBT_SCAN2NDPAGE,
+ .offs = 5,
+ .len = 1,
+ .pattern = scan_ff_pattern
+};
+
static int __init mxcnd_probe(struct platform_device *pdev)
{
struct nand_chip *this;
@@ -973,7 +984,10 @@ static int __init mxcnd_probe(struct platform_device *pdev)
goto escan;
}
- host->pagesize_2k = (mtd->writesize == 2048) ? 1 : 0;
+ if (mtd->writesize == 2048) {
+ host->pagesize_2k = 1;
+ this->badblock_pattern = &smallpage_memorybased;
+ }
if (this->ecc.mode == NAND_ECC_HW) {
switch (mtd->oobsize) {
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