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| author | Miquel Raynal <miquel.raynal@free-electrons.com> | 2017-12-07 10:33:58 +0100 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-12-14 13:34:23 +0100 |
| commit | 707d81545dbc3d3ee4ae093fc600831eb97302e7 (patch) | |
| tree | 5cdd01e12f4cb525ddecf3646a2e87e3d14e854c /drivers/mtd | |
| parent | aeb93af96d0b0f0916aa0f65fe400a1808ea9cb9 (diff) | |
| download | op-kernel-dev-707d81545dbc3d3ee4ae093fc600831eb97302e7.zip op-kernel-dev-707d81545dbc3d3ee4ae093fc600831eb97302e7.tar.gz | |
mtd: nand: samsung: add ECC requirements for K9F4G08U0D
Samsung NAND chip K9F4G08U0D minimum ECC strength requirement is 1 bit
per 512 bytes. As the chip is not ONFI nor JEDEC and because of the lack
of these values, boards using it fail to probe the NAND controller
driver. Fix this by setting up the default values.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/nand_samsung.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mtd/nand/nand_samsung.c b/drivers/mtd/nand/nand_samsung.c index d348f01..f6b0a63 100644 --- a/drivers/mtd/nand/nand_samsung.c +++ b/drivers/mtd/nand/nand_samsung.c @@ -91,6 +91,12 @@ static void samsung_nand_decode_id(struct nand_chip *chip) } } else { nand_decode_ext_id(chip); + + /* Datasheet values for SLC Samsung K9F4G08U0D-S[I|C]B0(T00) */ + if (nand_is_slc(chip) && chip->id.data[1] == 0xDC) { + chip->ecc_step_ds = 512; + chip->ecc_strength_ds = 1; + } } } |
