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authorSascha Hauer <s.hauer@pengutronix.de>2013-08-20 09:54:40 +0200
committerDavid Woodhouse <David.Woodhouse@intel.com>2013-08-30 21:44:06 +0100
commit58146992c956c2104ca8990a621e39a20e9c9f94 (patch)
treeddc5e6ecad9f6057013c5a4480befde15ece8ee1 /drivers/mtd
parent7e7d83b32ed7094f73008a99db4fecb74b8c2099 (diff)
downloadop-kernel-dev-58146992c956c2104ca8990a621e39a20e9c9f94.zip
op-kernel-dev-58146992c956c2104ca8990a621e39a20e9c9f94.tar.gz
mtd: m25p80: make CONFIG_M25PXX_USE_FAST_READ safe to enable
This patch adds a flag to struct flash_info indicating that fast_read is not supported. This now gives the following logic when determing whether to enable fastread: If the flash chip does not support fast_read, then disable it. Otherwise: 1) enable fast_read if device node contains m25p,fast-read 2) enable fast_read if forced in Kconfig This makes enabling CONFIG_M25PXX_USE_FAST_READ a safe option since we no longer enable the fast_read option unconditionally. For now fast_read is disabled for the everspin mr25h256 and the catalyst devices. Others may need the flag aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/devices/m25p80.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 0b8672b..6f93d32 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -691,6 +691,7 @@ struct flash_info {
#define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
#define M25P_NO_ERASE 0x02 /* No erase command needed */
#define SST_WRITE 0x04 /* use SST byte programming */
+#define M25P_NO_FR 0x08 /* Can't do fastread */
};
#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
@@ -741,7 +742,7 @@ static const struct spi_device_id m25p_ids[] = {
{ "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },
/* Everspin */
- { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, M25P_NO_ERASE) },
+ { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, M25P_NO_ERASE | M25P_NO_FR) },
/* GigaDevice */
{ "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SECT_4K) },
@@ -856,11 +857,11 @@ static const struct spi_device_id m25p_ids[] = {
{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) },
/* Catalyst / On Semiconductor -- non-JEDEC */
- { "cat25c11", CAT25_INFO( 16, 8, 16, 1, M25P_NO_ERASE) },
- { "cat25c03", CAT25_INFO( 32, 8, 16, 2, M25P_NO_ERASE) },
- { "cat25c09", CAT25_INFO( 128, 8, 32, 2, M25P_NO_ERASE) },
- { "cat25c17", CAT25_INFO( 256, 8, 32, 2, M25P_NO_ERASE) },
- { "cat25128", CAT25_INFO(2048, 8, 64, 2, M25P_NO_ERASE) },
+ { "cat25c11", CAT25_INFO( 16, 8, 16, 1, M25P_NO_ERASE | M25P_NO_FR) },
+ { "cat25c03", CAT25_INFO( 32, 8, 16, 2, M25P_NO_ERASE | M25P_NO_FR) },
+ { "cat25c09", CAT25_INFO( 128, 8, 32, 2, M25P_NO_ERASE | M25P_NO_FR) },
+ { "cat25c17", CAT25_INFO( 256, 8, 32, 2, M25P_NO_ERASE | M25P_NO_FR) },
+ { "cat25128", CAT25_INFO(2048, 8, 64, 2, M25P_NO_ERASE | M25P_NO_FR) },
{ },
};
MODULE_DEVICE_TABLE(spi, m25p_ids);
@@ -1044,6 +1045,8 @@ static int m25p_probe(struct spi_device *spi)
#ifdef CONFIG_M25PXX_USE_FAST_READ
flash->fast_read = true;
#endif
+ if (info->flags & M25P_NO_FR)
+ flash->fast_read = false;
/* Default commands */
if (flash->fast_read)
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