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authorSemun Lee <semun.lee@samsung.com>2008-09-01 11:49:27 +0100
committerDavid Woodhouse <David.Woodhouse@intel.com>2008-09-01 11:49:27 +0100
commit4262bd2981307258b31e15f1a526d2b3884e77b5 (patch)
treed5b03787a63bf43bf28f2a4dd54d994c44e57797 /drivers/mtd
parent3fc678a0e63138f56109ea31850f19b2e29c45b8 (diff)
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[MTD] [NAND] pxa3xx_nand_flash: Add definition of STM2GbX16 NAND flashes
Signed-off-by: Semun Lee <semun.lee@samsung.com> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index a64ad15..0cd213c 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -291,10 +291,33 @@ static struct pxa3xx_nand_flash micron1GbX16 = {
.chip_id = 0xb12c,
};
+static struct pxa3xx_nand_timing stm2GbX16_timing = {
+ .tCH = 10,
+ .tCS = 35,
+ .tWH = 15,
+ .tWP = 25,
+ .tRH = 15,
+ .tRP = 25,
+ .tR = 25000,
+ .tWHR = 60,
+ .tAR = 10,
+};
+
+static struct pxa3xx_nand_flash stm2GbX16 = {
+ .timing = &stm2GbX16_timing,
+ .page_per_block = 64,
+ .page_size = 2048,
+ .flash_width = 16,
+ .dfc_width = 16,
+ .num_blocks = 2048,
+ .chip_id = 0xba20,
+};
+
static struct pxa3xx_nand_flash *builtin_flash_types[] = {
&samsung512MbX16,
&micron1GbX8,
&micron1GbX16,
+ &stm2GbX16,
};
#define NDTR0_tCH(c) (min((c), 7) << 19)
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