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authorBrian Norris <norris@broadcom.com>2010-08-13 10:29:14 -0700
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-08-13 21:11:54 +0100
commit84c4f46d9c0bd67b763b01a6b4c86dcfde6c818a (patch)
tree3e6fea52757d165649c574d4ea9c80f3d5335d9f /drivers/mtd/nand
parentf78ec6b2f32efad1fc6b2196e966dcec8122d689 (diff)
downloadop-kernel-dev-84c4f46d9c0bd67b763b01a6b4c86dcfde6c818a.zip
op-kernel-dev-84c4f46d9c0bd67b763b01a6b4c86dcfde6c818a.tar.gz
mtd/nand_ids: Fix buswidth
The buswidth for chips of ID 0xD7 is x8, not x16. This was my previous typo. Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/nand_ids.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index a04b891..c65f190 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -112,7 +112,7 @@ struct nand_flash_dev nand_flash_ids[] = {
{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
/* 32 Gigabit */
- {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS16},
+ {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS},
/*
* Renesas AND 1 Gigabit. Those chips do not support extended id and
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