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authorMiquel Raynal <miquel.raynal@bootlin.com>2018-03-19 14:47:27 +0100
committerBoris Brezillon <boris.brezillon@bootlin.com>2018-03-20 11:59:54 +0100
commita97421c7532d382ab560ca153bdf9450f97c7e41 (patch)
tree89567f86b754de576c35bb6dd9574d62eb47bcce /drivers/mtd/nand/raw/gpmi-nand
parentf4531b2b1929806d2bec1a2f19805031d8bc0806 (diff)
downloadop-kernel-dev-a97421c7532d382ab560ca153bdf9450f97c7e41.zip
op-kernel-dev-a97421c7532d382ab560ca153bdf9450f97c7e41.tar.gz
mtd: rawnand: prepare the removal of the ONFI parameter page
The NAND chip parameter page is statically allocated within the nand_chip structure, which reserves a lot of space. Even not ONFI nor JEDEC chips have it embedded. Also, only a few parameters are actually read from the parameter page after the detection. ONFI-related parameters that will be used outside from the identification function are stored in a separate onfi_parameters structure embedded in nand_parameters, this small structure that already hold generic parameters. For now, the onfi_parameters structure is allocated statically. However, after some deep rework in the NAND framework, it will be possible to do dynamic allocations from the NAND identification phase, and this strcuture will then be dynamically allocated when needed. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Diffstat (limited to 'drivers/mtd/nand/raw/gpmi-nand')
-rw-r--r--drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c
index 039f279..f3cc383 100644
--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c
@@ -971,7 +971,7 @@ int gpmi_extra_init(struct gpmi_nand_data *this)
struct nand_chip *chip = &this->nand;
/* Enable the asynchronous EDO feature. */
- if (GPMI_IS_MX6(this) && chip->onfi_version) {
+ if (GPMI_IS_MX6(this) && chip->parameters.onfi.version) {
int mode = onfi_get_async_timing_mode(chip);
/* We only support the timing mode 4 and mode 5. */
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