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| author | Peter Meerwald <p.meerwald@bct-electronic.com> | 2012-07-19 13:21:04 +0200 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-09-29 14:54:20 +0100 |
| commit | 4cacbe226f39061f3e6730a08e3323e04a0de03f (patch) | |
| tree | 458dada8e9fed04970e8200b09a093445051c422 /drivers/mtd/nand/omap2.c | |
| parent | bf7a01bf7987b63b121d572b240c132ec44129c4 (diff) | |
| download | op-kernel-dev-4cacbe226f39061f3e6730a08e3323e04a0de03f.zip op-kernel-dev-4cacbe226f39061f3e6730a08e3323e04a0de03f.tar.gz | |
mtd: omap2: fix some typos in comments
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand/omap2.c')
| -rw-r--r-- | drivers/mtd/nand/omap2.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index ac4fd75..1ede9fb 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -347,7 +347,7 @@ static void omap_nand_dma_callback(void *data) } /* - * omap_nand_dma_transfer: configer and start dma transfer + * omap_nand_dma_transfer: configure and start dma transfer * @mtd: MTD device structure * @addr: virtual address in RAM of source/destination * @len: number of data bytes to be transferred @@ -463,7 +463,7 @@ static void omap_write_buf_dma_pref(struct mtd_info *mtd, } /* - * omap_nand_irq - GMPC irq handler + * omap_nand_irq - GPMC irq handler * @this_irq: gpmc irq number * @dev: omap_nand_info structure pointer is passed here */ @@ -1205,8 +1205,8 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) /* * If RDY/BSY line is connected to OMAP then use the omap ready - * funcrtion and the generic nand_wait function which reads the status - * register after monitoring the RDY/BSY line.Otherwise use a standard + * function and the generic nand_wait function which reads the status + * register after monitoring the RDY/BSY line. Otherwise use a standard * chip delay which is slightly more than tR (AC Timing) of the NAND * device and read status register until you get a failure or success */ @@ -1287,7 +1287,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) info->nand.verify_buf = omap_verify_buf; - /* selsect the ecc type */ + /* select the ecc type */ if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT) info->nand.ecc.mode = NAND_ECC_SOFT; else if ((pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) || |
