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authorXiaolei Li <xiaolei.li@mediatek.com>2017-05-31 16:26:41 +0800
committerBoris Brezillon <boris.brezillon@free-electrons.com>2017-06-01 10:09:38 +0200
commit30ee809e980b07f467fca3e7ee16e8d034cf41af (patch)
tree7019b5559540e8905250b744802d7d40691a5296 /drivers/mtd/nand/mtk_nand.c
parent7ec4a37c5d71f0a0bfeb1346d4e832a090ca292d (diff)
downloadop-kernel-dev-30ee809e980b07f467fca3e7ee16e8d034cf41af.zip
op-kernel-dev-30ee809e980b07f467fca3e7ee16e8d034cf41af.tar.gz
mtd: nand: mediatek: add support for MT2712 NAND FLASH Controller
MT2712 NAND FLASH Controller is similar to MT2701 except those following: (1) MT2712 supports up to 148B spare size per 1KB size sector (the same with 74B spare size per 512B size sector). There are three new spare format: 61, 67, 74. (2) MT2712 supports up to 80 bit ecc strength. There are three new ecc strength level: 68, 72, 80. (3) MT2712 ECC encode parity data register's start offset is 0x300, and different with 0x10 of MT2701. (4) MT2712 improves ecc irq function. When ECC works in ECC_NFI_MODE, MT2701 will generate ecc irq number the same with ecc steps during page read. However, MT2712 can only generate one ecc irq. Changes of this patch are: (1) add two new variables named pg_irq_sel, encode_parity_reg0 in struct mtk_ecc_caps. (2) add new bitfield ECC_PG_IRQ_SEL for register ECC_IRQ_REG. (3) add ecc strength array of mt2712. (4) add spare size array of mt2712. (5) add mt2712 nfc and ecc device compatiable and data. Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/nand/mtk_nand.c')
-rw-r--r--drivers/mtd/nand/mtk_nand.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/mtd/nand/mtk_nand.c b/drivers/mtd/nand/mtk_nand.c
index e428669..4d9ee27 100644
--- a/drivers/mtd/nand/mtk_nand.c
+++ b/drivers/mtd/nand/mtk_nand.c
@@ -164,6 +164,11 @@ static const u8 spare_size_mt2701[] = {
16, 26, 27, 28, 32, 36, 40, 44, 48, 49, 50, 51, 52, 62, 63, 64
};
+static const u8 spare_size_mt2712[] = {
+ 16, 26, 27, 28, 32, 36, 40, 44, 48, 49, 50, 51, 52, 62, 61, 63, 64, 67,
+ 74
+};
+
static inline struct mtk_nfc_nand_chip *to_mtk_nand(struct nand_chip *nand)
{
return container_of(nand, struct mtk_nfc_nand_chip, nand);
@@ -1327,10 +1332,19 @@ static const struct mtk_nfc_caps mtk_nfc_caps_mt2701 = {
.pageformat_spare_shift = 4,
};
+static const struct mtk_nfc_caps mtk_nfc_caps_mt2712 = {
+ .spare_size = spare_size_mt2712,
+ .num_spare_size = 19,
+ .pageformat_spare_shift = 16,
+};
+
static const struct of_device_id mtk_nfc_id_table[] = {
{
.compatible = "mediatek,mt2701-nfc",
.data = &mtk_nfc_caps_mt2701,
+ }, {
+ .compatible = "mediatek,mt2712-nfc",
+ .data = &mtk_nfc_caps_mt2712,
},
{}
};
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