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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-06-13 22:45:38 +0900 |
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committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-06-20 09:14:29 +0200 |
commit | c19e31d0a32dd3ee555a536414104acf86b9a884 (patch) | |
tree | ee115b817b57b56cc341f4cf62faedc353d9fcbb /drivers/mtd/nand/denali.h | |
parent | 1bb88666775e50fdef1d915d395eca9267bd3ab1 (diff) | |
download | op-kernel-dev-c19e31d0a32dd3ee555a536414104acf86b9a884.zip op-kernel-dev-c19e31d0a32dd3ee555a536414104acf86b9a884.tar.gz |
mtd: nand: denali: rework interrupt handling
Simplify the interrupt handling and fix issues:
- The register field view of INTR_EN / INTR_STATUS is different
among IP versions. The global macro DENALI_IRQ_ALL is hard-coded
for Intel platforms. The interrupt mask should be determined at
run-time depending on the running platform.
- wait_for_irq() loops do {} while() until interested flags are
asserted. The logic can be simplified.
- The spin_lock() guard seems too complex (and suspicious in a race
condition if wait_for_completion_timeout() bails out by timeout).
- denali->complete is reused again and again, but reinit_completion()
is missing. Add it.
Re-work the code to make it more robust and easier to handle.
While we are here, also rename the jump label "failed_req_irq" to
more appropriate "disable_irq".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/nand/denali.h')
-rw-r--r-- | drivers/mtd/nand/denali.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index fb47389..a0ac0f8 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -325,6 +325,7 @@ struct denali_nand_info { /* elements used by ISR */ struct completion complete; spinlock_t irq_lock; + uint32_t irq_mask; uint32_t irq_status; int irq; |