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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-09-13 11:05:51 +0900 |
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committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-09-18 14:55:54 +0200 |
commit | a3750a6422a7112740fe69a596bcd5eb62577aed (patch) | |
tree | 918d0867198891a5aba457561e30af17d292870c /drivers/mtd/nand/denali.c | |
parent | 14157f861437ebe2d624b0a845b91bbdf8ca9a2d (diff) | |
download | op-kernel-dev-a3750a6422a7112740fe69a596bcd5eb62577aed.zip op-kernel-dev-a3750a6422a7112740fe69a596bcd5eb62577aed.tar.gz |
mtd: nand: denali: support two row address cycle devices
The register TWO_ROW_ADDR_CYCLES specifies the number of row address
cycles of the device, but it is fixed to 0 in the driver init code
(i.e. always 3 row address cycles).
Reflect the result of nand_scan_ident() to the register setting
in order to support 2 row address cycle devices.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/nand/denali.c')
-rw-r--r-- | drivers/mtd/nand/denali.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 3087b0b..aefdc83 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1137,8 +1137,6 @@ static void denali_hw_init(struct denali_nand_info *denali) iowrite32(0xffff, denali->reg + SPARE_AREA_MARKER); - /* Should set value for these registers when init */ - iowrite32(0, denali->reg + TWO_ROW_ADDR_CYCLES); iowrite32(1, denali->reg + ECC_ENABLE); } @@ -1379,6 +1377,8 @@ int denali_init(struct denali_nand_info *denali) denali->reg + PAGES_PER_BLOCK); iowrite32(chip->options & NAND_BUSWIDTH_16 ? 1 : 0, denali->reg + DEVICE_WIDTH); + iowrite32(chip->options & NAND_ROW_ADDR_3 ? 0 : TWO_ROW_ADDR_CYCLES__FLAG, + denali->reg + TWO_ROW_ADDR_CYCLES); iowrite32(mtd->writesize, denali->reg + DEVICE_MAIN_AREA_SIZE); iowrite32(mtd->oobsize, denali->reg + DEVICE_SPARE_AREA_SIZE); |