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authorAlexander Shiyan <shc_work@mail.ru>2012-05-06 09:21:57 +0400
committerArnd Bergmann <arnd@arndb.de>2012-05-11 16:18:01 +0200
commit304b2c684e42af5b72d643322f783d88538dc817 (patch)
tree9e5fac4f8873a228a1f433f6f1e4dc6d8ad91f2e /drivers/mtd/nand/autcpu12.c
parent69964ea4c7b68c9399f7977aa5b9aa6539a6a98a (diff)
downloadop-kernel-dev-304b2c684e42af5b72d643322f783d88538dc817.zip
op-kernel-dev-304b2c684e42af5b72d643322f783d88538dc817.tar.gz
ARM: clps711x: Using a single definition for the PHYS and VIRT registers offset
Using a single definition for the physical and virtual address register for all variants boards clps711x. This patch also includes the use of a single function clps_read/write in some units. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/mtd/nand/autcpu12.c')
-rw-r--r--drivers/mtd/nand/autcpu12.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c
index 2e42ec2..04769a4 100644
--- a/drivers/mtd/nand/autcpu12.c
+++ b/drivers/mtd/nand/autcpu12.c
@@ -102,10 +102,10 @@ static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd,
void __iomem *addr;
unsigned char bits;
- addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET;
- bits = (ctrl & NAND_CLE) << 4;
+ bits = clps_readb(AUTCPU12_SMC_PORT_OFFSET) & ~0x30;
+ bits |= (ctrl & NAND_CLE) << 4;
bits |= (ctrl & NAND_ALE) << 2;
- writeb((readb(addr) & ~0x30) | bits, addr);
+ clps_writeb(bits, AUTCPU12_SMC_PORT_OFFSET);
addr = autcpu12_fio_base + AUTCPU12_SMC_SELECT_OFFSET;
writeb((readb(addr) & ~0x1) | (ctrl & NAND_NCE), addr);
@@ -120,9 +120,7 @@ static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd,
*/
int autcpu12_device_ready(struct mtd_info *mtd)
{
- void __iomem *addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET;
-
- return readb(addr) & AUTCPU12_SMC_RDY;
+ return clps_readb(AUTCPU12_SMC_PORT_OFFSET) & AUTCPU12_SMC_RDY;
}
/*
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