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authorNicolas Pitre <nico@fluxnic.net>2009-12-11 02:21:57 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-12-14 14:53:21 +0000
commitccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218 (patch)
treef4de2fb21cc45716c2dbcb98acb176c4295a551c /drivers/mtd/maps
parent3067e02f8f3ae2f3f02ba76400d03b8bcb4942b0 (diff)
downloadop-kernel-dev-ccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218.zip
op-kernel-dev-ccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218.tar.gz
ARM: 5848/1: kill flush_ioremap_region()
There is not enough users to warrant its existence, and it is actually an obstacle to progress with the new DMA API which cannot cover this case properly. To keep backward compatibility, let's perform the necessary custom cache maintenance locally in the only driver affected. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/mtd/maps')
-rw-r--r--drivers/mtd/maps/pxa2xx-flash.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c
index 74fa075..b13f641 100644
--- a/drivers/mtd/maps/pxa2xx-flash.c
+++ b/drivers/mtd/maps/pxa2xx-flash.c
@@ -20,14 +20,23 @@
#include <asm/io.h>
#include <mach/hardware.h>
-#include <asm/cacheflush.h>
#include <asm/mach/flash.h>
+#define CACHELINESIZE 32
+
static void pxa2xx_map_inval_cache(struct map_info *map, unsigned long from,
ssize_t len)
{
- flush_ioremap_region(map->phys, map->cached, from, len);
+ unsigned long start = (unsigned long)map->cached + from;
+ unsigned long end = start + len;
+
+ start &= ~(CACHELINESIZE - 1);
+ while (start < end) {
+ /* invalidate D cache line */
+ asm volatile ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
+ start += CACHELINESIZE;
+ }
}
struct pxa2xx_flash_info {
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