diff options
| author | Cyrille Pitchen <cyrille.pitchen@atmel.com> | 2016-10-27 11:55:39 +0200 |
|---|---|---|
| committer | Cyrille Pitchen <cyrille.pitchen@atmel.com> | 2017-02-10 13:55:03 +0100 |
| commit | 902cc69a0820252c84c6f7caed350882cea166ba (patch) | |
| tree | 3fbcf15a1ec5a2fae4142b4ebaaac924991ad2d2 /drivers/mtd/devices/serial_flash_cmds.h | |
| parent | 9e276de6a367cde07c1a63522152985d4e5cca8b (diff) | |
| download | op-kernel-dev-902cc69a0820252c84c6f7caed350882cea166ba.zip op-kernel-dev-902cc69a0820252c84c6f7caed350882cea166ba.tar.gz | |
mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes
This patch renames the SPINOR_OP_* macros of the 4-byte address
instruction set so the new names all share a common pattern: the 4-byte
address name is built from the 3-byte address name appending the "_4B"
suffix.
The patch also introduces new op codes to support other SPI protocols such
as SPI 1-4-4 and SPI 1-2-2.
This is a transitional patch and will help a later patch of spi-nor.c
to automate the translation from the 3-byte address op codes into their
4-byte address version.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Diffstat (limited to 'drivers/mtd/devices/serial_flash_cmds.h')
| -rw-r--r-- | drivers/mtd/devices/serial_flash_cmds.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/mtd/devices/serial_flash_cmds.h b/drivers/mtd/devices/serial_flash_cmds.h index f59a125..8b81e15 100644 --- a/drivers/mtd/devices/serial_flash_cmds.h +++ b/drivers/mtd/devices/serial_flash_cmds.h @@ -18,19 +18,12 @@ #define SPINOR_OP_RDVCR 0x85 /* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */ -#define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */ -#define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */ - #define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */ #define SPINOR_OP_WRITE_1_1_2 0xa2 /* DUAL INPUT PROGRAM */ #define SPINOR_OP_WRITE_1_2_2 0xd2 /* DUAL INPUT EXT PROGRAM */ #define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */ #define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */ -/* READ commands with 32-bit addressing */ -#define SPINOR_OP_READ4_1_2_2 0xbc -#define SPINOR_OP_READ4_1_4_4 0xec - /* Configuration flags */ #define FLASH_FLAG_SINGLE 0x000000ff #define FLASH_FLAG_READ_WRITE 0x00000001 |
