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| author | Guillaume LECERF <glecerf@gmail.com> | 2010-10-26 11:31:55 +0100 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-10-26 11:38:48 +0100 |
| commit | 9fc05fcadadcf3d6ddfe288e2e5c7ad0773b2abf (patch) | |
| tree | f9c4d69386bf3601ab4ca3706df6aff7efdd5a5b /drivers/mtd/chips/cfi_cmdset_0002.c | |
| parent | fc61015f72808f2fd83657909d02f4d29404b8c6 (diff) | |
| download | op-kernel-dev-9fc05fcadadcf3d6ddfe288e2e5c7ad0773b2abf.zip op-kernel-dev-9fc05fcadadcf3d6ddfe288e2e5c7ad0773b2abf.tar.gz | |
mtd: cfi_cmdset_0002: add CFI detection for SST 38VF640x chips
Add support for SST38VF640x chips in CFI mode.
Signed-off-by: Guillaume LECERF <glecerf@gmail.com>
Signed-off-by: yidong zhang <zhangyd6@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/chips/cfi_cmdset_0002.c')
| -rw-r--r-- | drivers/mtd/chips/cfi_cmdset_0002.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index 1934476..eb8ce0c 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -293,6 +293,21 @@ static void fixup_sst39vf_rev_b(struct mtd_info *mtd, void *param) cfi->addr_unlock2 = 0x2AA; } +static void fixup_sst38vf640x_sectorsize(struct mtd_info *mtd, void *param) +{ + struct map_info *map = mtd->priv; + struct cfi_private *cfi = map->fldrv_priv; + + fixup_sst39vf_rev_b(mtd, param); + + /* + * CFI reports 1024 sectors (0x03ff+1) of 64KBytes (0x0100*256) where + * it should report a size of 8KBytes (0x0020*256). + */ + cfi->cfiq->EraseRegionInfo[0] = 0x002003ff; + pr_warning("%s: Bad 38VF640x CFI data; adjusting sector size from 64 to 8KiB\n", mtd->name); +} + static void fixup_s29gl064n_sectors(struct mtd_info *mtd, void *param) { struct map_info *map = mtd->priv; @@ -344,6 +359,10 @@ static struct cfi_fixup cfi_fixup_table[] = { { CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors, NULL, }, { CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors, NULL, }, { CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors, NULL, }, + { CFI_MFR_SST, 0x536A, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6402 */ + { CFI_MFR_SST, 0x536B, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6401 */ + { CFI_MFR_SST, 0x536C, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6404 */ + { CFI_MFR_SST, 0x536D, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6403 */ #if !FORCE_WORD_WRITE { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, #endif @@ -374,6 +393,13 @@ static void cfi_fixup_major_minor(struct cfi_private *cfi, if (cfi->mfr == CFI_MFR_SAMSUNG && cfi->id == 0x257e && extp->MajorVersion == '0') extp->MajorVersion = '1'; + /* + * SST 38VF640x chips report major=0xFF / minor=0xFF. + */ + if (cfi->mfr == CFI_MFR_SST && (cfi->id >> 4) == 0x0536) { + extp->MajorVersion = '1'; + extp->MinorVersion = '0'; + } } struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary) |
