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authorDong Aisheng <aisheng.dong@nxp.com>2016-07-12 15:46:20 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2016-07-25 10:34:57 +0200
commit7ac6da2623a4d4b68c61bc289451ac630ae8ec35 (patch)
treebeb8fc70c9bae06813a34c6b313c923627ae5535 /drivers/mmc
parentda0295ff1db13765ad0da6cc7c2117f15c83b562 (diff)
downloadop-kernel-dev-7ac6da2623a4d4b68c61bc289451ac630ae8ec35.zip
op-kernel-dev-7ac6da2623a4d4b68c61bc289451ac630ae8ec35.tar.gz
mmc: sdhci-esdhc-imx: fix strobe DLL lock wrong clock issue
When enable DDR, the clock factor definition is changed. e.g. original 200Mhz will become 100Mhz once MIX_CTRL_DDREN bit is set So we need to update the clock setting then the strobe dll can lock the correct clock rate. Additionally we also need disable the clock before locking strobe dll. Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index ac2c83a..bbb0bd4 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -853,6 +853,11 @@ static void esdhc_set_strobe_dll(struct sdhci_host *host)
u32 v;
if (host->mmc->actual_clock > ESDHC_STROBE_DLL_CLK_FREQ) {
+ /* disable clock before enabling strobe dll */
+ writel(readl(host->ioaddr + ESDHC_VENDOR_SPEC) &
+ ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON,
+ host->ioaddr + ESDHC_VENDOR_SPEC);
+
/* force a reset on strobe dll */
writel(ESDHC_STROBE_DLL_CTRL_RESET,
host->ioaddr + ESDHC_STROBE_DLL_CTRL);
@@ -914,6 +919,8 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing)
m |= ESDHC_MIX_CTRL_DDREN | ESDHC_MIX_CTRL_HS400_EN;
writel(m, host->ioaddr + ESDHC_MIX_CTRL);
imx_data->is_ddr = 1;
+ /* update clock after enable DDR for strobe DLL lock */
+ host->ops->set_clock(host, host->clock);
esdhc_set_strobe_dll(host);
break;
}
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