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| author | Ben Dooks <ben.dooks@codethink.co.uk> | 2015-03-25 11:27:50 +0000 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2015-04-09 09:07:38 +0200 |
| commit | a2f17680f42878ee8d55a5e66c1466465a412f62 (patch) | |
| tree | df7f8647e2222d944a6b40b15f7c10e2b7d0ba2d /drivers/mmc | |
| parent | f5c5179b9a8ab8e3255f78e233d94ea54f23f832 (diff) | |
| download | op-kernel-dev-a2f17680f42878ee8d55a5e66c1466465a412f62.zip op-kernel-dev-a2f17680f42878ee8d55a5e66c1466465a412f62.tar.gz | |
mmc: dw_mmc: make IO accessors endian agnostic
The dw_mmc driver does not use endian agnostic IO accessors, so fix
the use of __raw reads and writes to be the relaxed versions.
This fixes the dw_mmc driver initialisation on Altera socfpga in big endian.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/dw_mmc.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index d239867..b8051d0 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -171,22 +171,22 @@ /* Register access macros */ #define mci_readl(dev, reg) \ - __raw_readl((dev)->regs + SDMMC_##reg) + readl_relaxed((dev)->regs + SDMMC_##reg) #define mci_writel(dev, reg, value) \ - __raw_writel((value), (dev)->regs + SDMMC_##reg) + writel_relaxed((value), (dev)->regs + SDMMC_##reg) /* 16-bit FIFO access macros */ #define mci_readw(dev, reg) \ - __raw_readw((dev)->regs + SDMMC_##reg) + readw_relaxed((dev)->regs + SDMMC_##reg) #define mci_writew(dev, reg, value) \ - __raw_writew((value), (dev)->regs + SDMMC_##reg) + writew_relaxed((value), (dev)->regs + SDMMC_##reg) /* 64-bit FIFO access macros */ #ifdef readq #define mci_readq(dev, reg) \ - __raw_readq((dev)->regs + SDMMC_##reg) + readq_relaxed((dev)->regs + SDMMC_##reg) #define mci_writeq(dev, reg, value) \ - __raw_writeq((value), (dev)->regs + SDMMC_##reg) + writeq_relaxed((value), (dev)->regs + SDMMC_##reg) #else /* * Dummy readq implementation for architectures that don't define it. |
