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authorPeter Griffin <peter.griffin@linaro.org>2015-04-10 10:40:28 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2015-04-10 12:55:40 +0200
commit4e187d3154e6a47dfb8561aa0003d93243ec7e4a (patch)
tree6e2431f4ee82c2dd6b35f4937a0acb6e63b9364c /drivers/mmc
parentcf48d32efb4b9e70ca1e17f2c38f77756e9aae58 (diff)
downloadop-kernel-dev-4e187d3154e6a47dfb8561aa0003d93243ec7e4a.zip
op-kernel-dev-4e187d3154e6a47dfb8561aa0003d93243ec7e4a.tar.gz
mmc: sdhci-st: Update the quirks for this controller.
Some additional quirks need to be enabled now we support UHS modes. This avoids some spurious warnings like "Got data interrupt 0x00000002 even though no data operation was in progress" Testing on stih410-b2120 board achieves the following speeds with HS200 eMMC card. max-frequency = 200Mhz /dev/mmcblk0p1: Timing buffered disk reads: 270 MB in 3.02 seconds = 89.54 MB/sec max-frequency = 100Mhz root@debian-armhf:~# hdparm -t /dev/mmcblk0p1 /dev/mmcblk0p1: Timing buffered disk reads: 210 MB in 3.00 seconds = 70.00 MB/sec max-frequency = 50Mhz root@debian-armhf:~# hdparm -t /dev/mmcblk0p1 /dev/mmcblk0p1: Timing buffered disk reads: 118 MB in 3.00 seconds = 39.28 MB/sec This is better than the 3.10 kernel which achieves 77.59 MB/sec at 200Mhz clock (same board/soc/eMMC). Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-st.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-st.c b/drivers/mmc/host/sdhci-st.c
index 42a361c..682f2bb 100644
--- a/drivers/mmc/host/sdhci-st.c
+++ b/drivers/mmc/host/sdhci-st.c
@@ -340,7 +340,10 @@ static const struct sdhci_ops sdhci_st_ops = {
static const struct sdhci_pltfm_data sdhci_st_pdata = {
.ops = &sdhci_st_ops,
.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
- SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
+ SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
+ SDHCI_QUIRK_NO_HISPD_BIT,
+ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+ SDHCI_QUIRK2_STOP_WITH_TC,
};
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