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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2014-07-16 00:45:13 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2014-07-26 11:38:19 +0200
commite36152aa84cf68bd7f09acffd480cd2b6aa5480d (patch)
treed3b879e43183ffae3370df1619e977b6ac8de4e4 /drivers/mmc
parentd25006e7e5045e76575e9f58903efc1a860a3ff1 (diff)
downloadop-kernel-dev-e36152aa84cf68bd7f09acffd480cd2b6aa5480d.zip
op-kernel-dev-e36152aa84cf68bd7f09acffd480cd2b6aa5480d.tar.gz
mmc: sh_mmcif: Configure DMA slave bus width
The data register is 4 bytes wide, hardcode the DMA transfer size to 4 bytes in both directions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sh_mmcif.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index 863d21e..d11708c 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -418,10 +418,13 @@ sh_mmcif_request_dma_one(struct sh_mmcif_host *host,
cfg.slave_id = slave_id;
cfg.direction = direction;
- if (direction == DMA_DEV_TO_MEM)
+ if (direction == DMA_DEV_TO_MEM) {
cfg.src_addr = res->start + MMCIF_CE_DATA;
- else
+ cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ } else {
cfg.dst_addr = res->start + MMCIF_CE_DATA;
+ cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ }
ret = dmaengine_slave_config(chan, &cfg);
if (ret < 0) {
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