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authorWolfram Sang <wsa+renesas@sang-engineering.com>2017-08-09 20:29:26 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2017-08-30 14:01:59 +0200
commit41279f0197583a0af4e52575bb8480c4f811b7a9 (patch)
treed034f340580f14b500d39348eabcb2adef8be420 /drivers/mmc
parentc7825151c70071a445778b226b972d8bfbe2e42a (diff)
downloadop-kernel-dev-41279f0197583a0af4e52575bb8480c4f811b7a9.zip
op-kernel-dev-41279f0197583a0af4e52575bb8480c4f811b7a9.tar.gz
mmc: sdhi: use maximum width for the sdbuf register
Make use of the 64 bit sdbuf width on Renesas R-Car Gen3. If the registers are 8 byte apart, the width is also 64 bit. For all others, the width is 32 bit, even if the registers are only 16 bit apart. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/renesas_sdhi_core.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 4262298..fcf7235 100644
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -460,10 +460,11 @@ static int renesas_sdhi_multi_io_quirk(struct mmc_card *card,
static void renesas_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
{
- sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? DMA_ENABLE_DMASDRW : 0);
+ /* Iff regs are 8 byte apart, sdbuf is 64 bit. Otherwise always 32. */
+ int width = (host->bus_shift == 2) ? 64 : 32;
- /* enable 32bit access if DMA mode if possibile */
- renesas_sdhi_sdbuf_width(host, enable ? 32 : 16);
+ sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? DMA_ENABLE_DMASDRW : 0);
+ renesas_sdhi_sdbuf_width(host, enable ? width : 16);
}
int renesas_sdhi_probe(struct platform_device *pdev,
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