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author | Ingo Molnar <mingo@elte.hu> | 2009-03-18 10:37:43 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-03-18 10:37:43 +0100 |
commit | 04dfcfcb54b073133bcca2c8f25b55e904558931 (patch) | |
tree | 123d13f9e242751f629924e92fcb297dc669d767 /drivers/mmc | |
parent | 0bd5c4f7c874cf48ff7904dcf8a59988c8fea0e8 (diff) | |
parent | ee568b25ee9e160b32d1aef73d8b2ee9c05d34db (diff) | |
download | op-kernel-dev-04dfcfcb54b073133bcca2c8f25b55e904558931.zip op-kernel-dev-04dfcfcb54b073133bcca2c8f25b55e904558931.tar.gz |
Merge branch 'linus' into core/iommu
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/core/mmc_ops.c | 15 | ||||
-rw-r--r-- | drivers/mmc/host/s3cmci.c | 3 |
2 files changed, 10 insertions, 8 deletions
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c index 9c50e6f..34ce270 100644 --- a/drivers/mmc/core/mmc_ops.c +++ b/drivers/mmc/core/mmc_ops.c @@ -248,12 +248,15 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host, sg_init_one(&sg, data_buf, len); - /* - * The spec states that CSR and CID accesses have a timeout - * of 64 clock cycles. - */ - data.timeout_ns = 0; - data.timeout_clks = 64; + if (opcode == MMC_SEND_CSD || opcode == MMC_SEND_CID) { + /* + * The spec states that CSR and CID accesses have a timeout + * of 64 clock cycles. + */ + data.timeout_ns = 0; + data.timeout_clks = 64; + } else + mmc_set_data_timeout(&data, card); mmc_wait_for_req(host, &mrq); diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c index f4a67c6..2db166b 100644 --- a/drivers/mmc/host/s3cmci.c +++ b/drivers/mmc/host/s3cmci.c @@ -793,8 +793,7 @@ static void s3cmci_dma_setup(struct s3cmci_host *host, host->mem->start + host->sdidata); if (!setup_ok) { - s3c2410_dma_config(host->dma, 4, - (S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI)); + s3c2410_dma_config(host->dma, 4, 0); s3c2410_dma_set_buffdone_fn(host->dma, s3cmci_dma_done_callback); s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART); |