diff options
| author | Cliff Brake <cbrake@bec-systems.com> | 2009-01-22 17:07:03 -0500 |
|---|---|---|
| committer | Pierre Ossman <drzeus@drzeus.cx> | 2009-02-02 20:57:07 +0100 |
| commit | b6018958a57f6621d6979c4384e42a3df636beed (patch) | |
| tree | 84806c5f1b5839e66edcfc811927b137fda7a247 /drivers/mmc | |
| parent | e10a854c4602072c34c03380b99da0a3ee15682c (diff) | |
| download | op-kernel-dev-b6018958a57f6621d6979c4384e42a3df636beed.zip op-kernel-dev-b6018958a57f6621d6979c4384e42a3df636beed.tar.gz | |
pxamci: enable DMA for write ops after CMD/RESP
With the PXA270 MMC hardware, there seems to be an issue of
data corruption on writes where a 4KB data block is offset
by one byte.
If we delay enabling the DMA for writes until after the CMD/RESP
has finished, the problem seems to be fixed.
related to PXA270 Erratum #91
Tested-by: Vernon Sauder <VernonInHand@gmail.com>
Signed-off-by: Cliff Brake <cbrake@bec-systems.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/pxamci.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index 3000422..9702ad3 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c @@ -180,7 +180,15 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data) else DALGN &= ~(1 << host->dma); DDADR(host->dma) = host->sg_dma; - DCSR(host->dma) = DCSR_RUN; + + /* + * workaround for erratum #91: + * only start DMA now if we are doing a read, + * otherwise we wait until CMD/RESP has finished + * before starting DMA. + */ + if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ) + DCSR(host->dma) = DCSR_RUN; } static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat) @@ -267,6 +275,12 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat) pxamci_disable_irq(host, END_CMD_RES); if (host->data && !cmd->error) { pxamci_enable_irq(host, DATA_TRAN_DONE); + /* + * workaround for erratum #91, if doing write + * enable DMA late + */ + if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE) + DCSR(host->dma) = DCSR_RUN; } else { pxamci_finish_request(host, host->mrq); } |
