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author | Ulf Hansson <ulf.hansson@linaro.org> | 2014-01-10 14:51:42 +0100 |
---|---|---|
committer | Chris Ball <chris@printf.net> | 2014-02-23 10:41:17 -0500 |
commit | e7f3d22289e4307b3071cc18b1d8ecc6598c0be4 (patch) | |
tree | 686b60dc3e1695d3e2a53308bd8dd5b9e8d35c41 /drivers/mmc/host | |
parent | bb5cba40dc7f079ea7ee3ae760b7c388b6eb5fc3 (diff) | |
download | op-kernel-dev-e7f3d22289e4307b3071cc18b1d8ecc6598c0be4.zip op-kernel-dev-e7f3d22289e4307b3071cc18b1d8ecc6598c0be4.tar.gz |
mmc: mmci: Handle CMD irq before DATA irq
In case of a read operation both MCI_CMDRESPEND and MCI_DATAEND can be
set in the status register when entering the interrupt handler. This is
due to that the card start sending data before the host has
acknowledged the command response.
To resolve the issue for this scenario, we must start by handling the
CMD irq instead of the DATA irq. The reason is beacuse the completion
of the DATA irq will not respect the current command and then causing
it to be garbled.
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Johan Rudholm <jrudholm@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <chris@printf.net>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r-- | drivers/mmc/host/mmci.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index b931226..8324e3e 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1144,16 +1144,17 @@ static irqreturn_t mmci_irq(int irq, void *dev_id) dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); + cmd = host->cmd; + if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT| + MCI_CMDRESPEND) && cmd) + mmci_cmd_irq(host, cmd, status); + data = host->data; if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_STARTBITERR| MCI_TXUNDERRUN|MCI_RXOVERRUN|MCI_DATAEND| MCI_DATABLOCKEND) && data) mmci_data_irq(host, data, status); - cmd = host->cmd; - if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd) - mmci_cmd_irq(host, cmd, status); - ret = 1; } while (status); |