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authorJames Morris <jmorris@namei.org>2009-06-30 09:10:35 +1000
committerJames Morris <jmorris@namei.org>2009-06-30 09:10:35 +1000
commitac7242142b03421c96b0a2f8d99f146d075614c2 (patch)
treeb0b2ead65858c7a343d38affed86fe815e37e7e9 /drivers/mmc/host/sdhci.h
parent89c86576ecde504da1eeb4f4882b2189ac2f9c4a (diff)
parent2bfdd79eaa0043346e773ba5f6cfd811ea31b73d (diff)
downloadop-kernel-dev-ac7242142b03421c96b0a2f8d99f146d075614c2.zip
op-kernel-dev-ac7242142b03421c96b0a2f8d99f146d075614c2.tar.gz
Merge branch 'master' into next
Diffstat (limited to 'drivers/mmc/host/sdhci.h')
-rw-r--r--drivers/mmc/host/sdhci.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 2de0834..831ddf7 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -226,6 +226,12 @@ struct sdhci_host {
#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1<<19)
/* Controller has to be forced to use block size of 2048 bytes */
#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20)
+/* Controller cannot do multi-block transfers */
+#define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21)
+/* Controller can only handle 1-bit data transfers */
+#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22)
+/* Controller needs 10ms delay between applying power and clock */
+#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23)
int irq; /* Device IRQ */
void __iomem * ioaddr; /* Mapped address */
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