diff options
| author | Steve Twiss <stwiss.opensource@diasemi.com> | 2018-03-28 12:03:09 +0100 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2018-05-16 09:21:48 +0100 |
| commit | b16d23931b7ee5acf17432c3a6b5c6edb204aa35 (patch) | |
| tree | 112e1d2cb4c8de4305b617ae25eb4655182c59e6 /drivers/mfd | |
| parent | c18604660ad02324dfc21de5dfd0c8d15e9070a5 (diff) | |
| download | op-kernel-dev-b16d23931b7ee5acf17432c3a6b5c6edb204aa35.zip op-kernel-dev-b16d23931b7ee5acf17432c3a6b5c6edb204aa35.tar.gz | |
mfd: da9062: Use core helper regmap_reg_range macros
Replace multi-line entries in the regmap_range arrays with single
line macros: regmap_reg_range(). This will leave the static structure
array entries for regmap_range unaltered. It will significantly reduce
the line count in the DA9062/61 core file.
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd')
| -rw-r--r-- | drivers/mfd/da9062-core.c | 462 |
1 files changed, 114 insertions, 348 deletions
diff --git a/drivers/mfd/da9062-core.c b/drivers/mfd/da9062-core.c index fe18115..9f61059 100644 --- a/drivers/mfd/da9062-core.c +++ b/drivers/mfd/da9062-core.c @@ -365,186 +365,69 @@ static int da9062_get_device_type(struct da9062 *chip) } static const struct regmap_range da9061_aa_readable_ranges[] = { - { - .range_min = DA9062AA_PAGE_CON, - .range_max = DA9062AA_STATUS_B, - }, { - .range_min = DA9062AA_STATUS_D, - .range_max = DA9062AA_EVENT_C, - }, { - .range_min = DA9062AA_IRQ_MASK_A, - .range_max = DA9062AA_IRQ_MASK_C, - }, { - .range_min = DA9062AA_CONTROL_A, - .range_max = DA9062AA_GPIO_4, - }, { - .range_min = DA9062AA_GPIO_WKUP_MODE, - .range_max = DA9062AA_GPIO_OUT3_4, - }, { - .range_min = DA9062AA_BUCK1_CONT, - .range_max = DA9062AA_BUCK4_CONT, - }, { - .range_min = DA9062AA_BUCK3_CONT, - .range_max = DA9062AA_BUCK3_CONT, - }, { - .range_min = DA9062AA_LDO1_CONT, - .range_max = DA9062AA_LDO4_CONT, - }, { - .range_min = DA9062AA_DVC_1, - .range_max = DA9062AA_DVC_1, - }, { - .range_min = DA9062AA_SEQ, - .range_max = DA9062AA_ID_4_3, - }, { - .range_min = DA9062AA_ID_12_11, - .range_max = DA9062AA_ID_16_15, - }, { - .range_min = DA9062AA_ID_22_21, - .range_max = DA9062AA_ID_32_31, - }, { - .range_min = DA9062AA_SEQ_A, - .range_max = DA9062AA_WAIT, - }, { - .range_min = DA9062AA_RESET, - .range_max = DA9062AA_BUCK_ILIM_C, - }, { - .range_min = DA9062AA_BUCK1_CFG, - .range_max = DA9062AA_BUCK3_CFG, - }, { - .range_min = DA9062AA_VBUCK1_A, - .range_max = DA9062AA_VBUCK4_A, - }, { - .range_min = DA9062AA_VBUCK3_A, - .range_max = DA9062AA_VBUCK3_A, - }, { - .range_min = DA9062AA_VLDO1_A, - .range_max = DA9062AA_VLDO4_A, - }, { - .range_min = DA9062AA_VBUCK1_B, - .range_max = DA9062AA_VBUCK4_B, - }, { - .range_min = DA9062AA_VBUCK3_B, - .range_max = DA9062AA_VBUCK3_B, - }, { - .range_min = DA9062AA_VLDO1_B, - .range_max = DA9062AA_VLDO4_B, - }, { - .range_min = DA9062AA_INTERFACE, - .range_max = DA9062AA_CONFIG_E, - }, { - .range_min = DA9062AA_CONFIG_G, - .range_max = DA9062AA_CONFIG_K, - }, { - .range_min = DA9062AA_CONFIG_M, - .range_max = DA9062AA_CONFIG_M, - }, { - .range_min = DA9062AA_GP_ID_0, - .range_max = DA9062AA_GP_ID_19, - }, { - .range_min = DA9062AA_DEVICE_ID, - .range_max = DA9062AA_CONFIG_ID, - }, + regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_STATUS_B), + regmap_reg_range(DA9062AA_STATUS_D, DA9062AA_EVENT_C), + regmap_reg_range(DA9062AA_IRQ_MASK_A, DA9062AA_IRQ_MASK_C), + regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_GPIO_4), + regmap_reg_range(DA9062AA_GPIO_WKUP_MODE, DA9062AA_GPIO_OUT3_4), + regmap_reg_range(DA9062AA_BUCK1_CONT, DA9062AA_BUCK4_CONT), + regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT), + regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT), + regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1), + regmap_reg_range(DA9062AA_SEQ, DA9062AA_ID_4_3), + regmap_reg_range(DA9062AA_ID_12_11, DA9062AA_ID_16_15), + regmap_reg_range(DA9062AA_ID_22_21, DA9062AA_ID_32_31), + regmap_reg_range(DA9062AA_SEQ_A, DA9062AA_WAIT), + regmap_reg_range(DA9062AA_RESET, DA9062AA_BUCK_ILIM_C), + regmap_reg_range(DA9062AA_BUCK1_CFG, DA9062AA_BUCK3_CFG), + regmap_reg_range(DA9062AA_VBUCK1_A, DA9062AA_VBUCK4_A), + regmap_reg_range(DA9062AA_VBUCK3_A, DA9062AA_VBUCK3_A), + regmap_reg_range(DA9062AA_VLDO1_A, DA9062AA_VLDO4_A), + regmap_reg_range(DA9062AA_VBUCK1_B, DA9062AA_VBUCK4_B), + regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B), + regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B), + regmap_reg_range(DA9062AA_INTERFACE, DA9062AA_CONFIG_E), + regmap_reg_range(DA9062AA_CONFIG_G, DA9062AA_CONFIG_K), + regmap_reg_range(DA9062AA_CONFIG_M, DA9062AA_CONFIG_M), + regmap_reg_range(DA9062AA_GP_ID_0, DA9062AA_GP_ID_19), + regmap_reg_range(DA9062AA_DEVICE_ID, DA9062AA_CONFIG_ID), }; static const struct regmap_range da9061_aa_writeable_ranges[] = { - { - .range_min = DA9062AA_PAGE_CON, - .range_max = DA9062AA_PAGE_CON, - }, { - .range_min = DA9062AA_FAULT_LOG, - .range_max = DA9062AA_EVENT_C, - }, { - .range_min = DA9062AA_IRQ_MASK_A, - .range_max = DA9062AA_IRQ_MASK_C, - }, { - .range_min = DA9062AA_CONTROL_A, - .range_max = DA9062AA_GPIO_4, - }, { - .range_min = DA9062AA_GPIO_WKUP_MODE, - .range_max = DA9062AA_GPIO_OUT3_4, - }, { - .range_min = DA9062AA_BUCK1_CONT, - .range_max = DA9062AA_BUCK4_CONT, - }, { - .range_min = DA9062AA_BUCK3_CONT, - .range_max = DA9062AA_BUCK3_CONT, - }, { - .range_min = DA9062AA_LDO1_CONT, - .range_max = DA9062AA_LDO4_CONT, - }, { - .range_min = DA9062AA_DVC_1, - .range_max = DA9062AA_DVC_1, - }, { - .range_min = DA9062AA_SEQ, - .range_max = DA9062AA_ID_4_3, - }, { - .range_min = DA9062AA_ID_12_11, - .range_max = DA9062AA_ID_16_15, - }, { - .range_min = DA9062AA_ID_22_21, - .range_max = DA9062AA_ID_32_31, - }, { - .range_min = DA9062AA_SEQ_A, - .range_max = DA9062AA_WAIT, - }, { - .range_min = DA9062AA_RESET, - .range_max = DA9062AA_BUCK_ILIM_C, - }, { - .range_min = DA9062AA_BUCK1_CFG, - .range_max = DA9062AA_BUCK3_CFG, - }, { - .range_min = DA9062AA_VBUCK1_A, - .range_max = DA9062AA_VBUCK4_A, - }, { - .range_min = DA9062AA_VBUCK3_A, - .range_max = DA9062AA_VBUCK3_A, - }, { - .range_min = DA9062AA_VLDO1_A, - .range_max = DA9062AA_VLDO4_A, - }, { - .range_min = DA9062AA_VBUCK1_B, - .range_max = DA9062AA_VBUCK4_B, - }, { - .range_min = DA9062AA_VBUCK3_B, - .range_max = DA9062AA_VBUCK3_B, - }, { - .range_min = DA9062AA_VLDO1_B, - .range_max = DA9062AA_VLDO4_B, - }, { - .range_min = DA9062AA_GP_ID_0, - .range_max = DA9062AA_GP_ID_19, - }, + regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_PAGE_CON), + regmap_reg_range(DA9062AA_FAULT_LOG, DA9062AA_EVENT_C), + regmap_reg_range(DA9062AA_IRQ_MASK_A, DA9062AA_IRQ_MASK_C), + regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_GPIO_4), + regmap_reg_range(DA9062AA_GPIO_WKUP_MODE, DA9062AA_GPIO_OUT3_4), + regmap_reg_range(DA9062AA_BUCK1_CONT, DA9062AA_BUCK4_CONT), + regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT), + regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT), + regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1), + regmap_reg_range(DA9062AA_SEQ, DA9062AA_ID_4_3), + regmap_reg_range(DA9062AA_ID_12_11, DA9062AA_ID_16_15), + regmap_reg_range(DA9062AA_ID_22_21, DA9062AA_ID_32_31), + regmap_reg_range(DA9062AA_SEQ_A, DA9062AA_WAIT), + regmap_reg_range(DA9062AA_RESET, DA9062AA_BUCK_ILIM_C), + regmap_reg_range(DA9062AA_BUCK1_CFG, DA9062AA_BUCK3_CFG), + regmap_reg_range(DA9062AA_VBUCK1_A, DA9062AA_VBUCK4_A), + regmap_reg_range(DA9062AA_VBUCK3_A, DA9062AA_VBUCK3_A), + regmap_reg_range(DA9062AA_VLDO1_A, DA9062AA_VLDO4_A), + regmap_reg_range(DA9062AA_VBUCK1_B, DA9062AA_VBUCK4_B), + regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B), + regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B), + regmap_reg_range(DA9062AA_GP_ID_0, DA9062AA_GP_ID_19), }; static const struct regmap_range da9061_aa_volatile_ranges[] = { - { - .range_min = DA9062AA_PAGE_CON, - .range_max = DA9062AA_STATUS_B, - }, { - .range_min = DA9062AA_STATUS_D, - .range_max = DA9062AA_EVENT_C, - }, { - .range_min = DA9062AA_CONTROL_A, - .range_max = DA9062AA_CONTROL_B, - }, { - .range_min = DA9062AA_CONTROL_E, - .range_max = DA9062AA_CONTROL_F, - }, { - .range_min = DA9062AA_BUCK1_CONT, - .range_max = DA9062AA_BUCK4_CONT, - }, { - .range_min = DA9062AA_BUCK3_CONT, - .range_max = DA9062AA_BUCK3_CONT, - }, { - .range_min = DA9062AA_LDO1_CONT, - .range_max = DA9062AA_LDO4_CONT, - }, { - .range_min = DA9062AA_DVC_1, - .range_max = DA9062AA_DVC_1, - }, { - .range_min = DA9062AA_SEQ, - .range_max = DA9062AA_SEQ, - }, + regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_STATUS_B), + regmap_reg_range(DA9062AA_STATUS_D, DA9062AA_EVENT_C), + regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_CONTROL_B), + regmap_reg_range(DA9062AA_CONTROL_E, DA9062AA_CONTROL_F), + regmap_reg_range(DA9062AA_BUCK1_CONT, DA9062AA_BUCK4_CONT), + regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT), + regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT), + regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1), + regmap_reg_range(DA9062AA_SEQ, DA9062AA_SEQ), }; static const struct regmap_access_table da9061_aa_readable_table = { @@ -587,186 +470,69 @@ static struct regmap_config da9061_regmap_config = { }; static const struct regmap_range da9062_aa_readable_ranges[] = { - { - .range_min = DA9062AA_PAGE_CON, - .range_max = DA9062AA_STATUS_B, - }, { - .range_min = DA9062AA_STATUS_D, - .range_max = DA9062AA_EVENT_C, - }, { - .range_min = DA9062AA_IRQ_MASK_A, - .range_max = DA9062AA_IRQ_MASK_C, - }, { - .range_min = DA9062AA_CONTROL_A, - .range_max = DA9062AA_GPIO_4, - }, { - .range_min = DA9062AA_GPIO_WKUP_MODE, - .range_max = DA9062AA_BUCK4_CONT, - }, { - .range_min = DA9062AA_BUCK3_CONT, - .range_max = DA9062AA_BUCK3_CONT, - }, { - .range_min = DA9062AA_LDO1_CONT, - .range_max = DA9062AA_LDO4_CONT, - }, { - .range_min = DA9062AA_DVC_1, - .range_max = DA9062AA_DVC_1, - }, { - .range_min = DA9062AA_COUNT_S, - .range_max = DA9062AA_SECOND_D, - }, { - .range_min = DA9062AA_SEQ, - .range_max = DA9062AA_ID_4_3, - }, { - .range_min = DA9062AA_ID_12_11, - .range_max = DA9062AA_ID_16_15, - }, { - .range_min = DA9062AA_ID_22_21, - .range_max = DA9062AA_ID_32_31, - }, { - .range_min = DA9062AA_SEQ_A, - .range_max = DA9062AA_BUCK3_CFG, - }, { - .range_min = DA9062AA_VBUCK2_A, - .range_max = DA9062AA_VBUCK4_A, - }, { - .range_min = DA9062AA_VBUCK3_A, - .range_max = DA9062AA_VBUCK3_A, - }, { - .range_min = DA9062AA_VLDO1_A, - .range_max = DA9062AA_VLDO4_A, - }, { - .range_min = DA9062AA_VBUCK2_B, - .range_max = DA9062AA_VBUCK4_B, - }, { - .range_min = DA9062AA_VBUCK3_B, - .range_max = DA9062AA_VBUCK3_B, - }, { - .range_min = DA9062AA_VLDO1_B, - .range_max = DA9062AA_VLDO4_B, - }, { - .range_min = DA9062AA_BBAT_CONT, - .range_max = DA9062AA_BBAT_CONT, - }, { - .range_min = DA9062AA_INTERFACE, - .range_max = DA9062AA_CONFIG_E, - }, { - .range_min = DA9062AA_CONFIG_G, - .range_max = DA9062AA_CONFIG_K, - }, { - .range_min = DA9062AA_CONFIG_M, - .range_max = DA9062AA_CONFIG_M, - }, { - .range_min = DA9062AA_TRIM_CLDR, - .range_max = DA9062AA_GP_ID_19, - }, { - .range_min = DA9062AA_DEVICE_ID, - .range_max = DA9062AA_CONFIG_ID, - }, + regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_STATUS_B), + regmap_reg_range(DA9062AA_STATUS_D, DA9062AA_EVENT_C), + regmap_reg_range(DA9062AA_IRQ_MASK_A, DA9062AA_IRQ_MASK_C), + regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_GPIO_4), + regmap_reg_range(DA9062AA_GPIO_WKUP_MODE, DA9062AA_BUCK4_CONT), + regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT), + regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT), + regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1), + regmap_reg_range(DA9062AA_COUNT_S, DA9062AA_SECOND_D), + regmap_reg_range(DA9062AA_SEQ, DA9062AA_ID_4_3), + regmap_reg_range(DA9062AA_ID_12_11, DA9062AA_ID_16_15), + regmap_reg_range(DA9062AA_ID_22_21, DA9062AA_ID_32_31), + regmap_reg_range(DA9062AA_SEQ_A, DA9062AA_BUCK3_CFG), + regmap_reg_range(DA9062AA_VBUCK2_A, DA9062AA_VBUCK4_A), + regmap_reg_range(DA9062AA_VBUCK3_A, DA9062AA_VBUCK3_A), + regmap_reg_range(DA9062AA_VLDO1_A, DA9062AA_VLDO4_A), + regmap_reg_range(DA9062AA_VBUCK2_B, DA9062AA_VBUCK4_B), + regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B), + regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B), + regmap_reg_range(DA9062AA_BBAT_CONT, DA9062AA_BBAT_CONT), + regmap_reg_range(DA9062AA_INTERFACE, DA9062AA_CONFIG_E), + regmap_reg_range(DA9062AA_CONFIG_G, DA9062AA_CONFIG_K), + regmap_reg_range(DA9062AA_CONFIG_M, DA9062AA_CONFIG_M), + regmap_reg_range(DA9062AA_TRIM_CLDR, DA9062AA_GP_ID_19), + regmap_reg_range(DA9062AA_DEVICE_ID, DA9062AA_CONFIG_ID), }; static const struct regmap_range da9062_aa_writeable_ranges[] = { - { - .range_min = DA9062AA_PAGE_CON, - .range_max = DA9062AA_PAGE_CON, - }, { - .range_min = DA9062AA_FAULT_LOG, - .range_max = DA9062AA_EVENT_C, - }, { - .range_min = DA9062AA_IRQ_MASK_A, - .range_max = DA9062AA_IRQ_MASK_C, - }, { - .range_min = DA9062AA_CONTROL_A, - .range_max = DA9062AA_GPIO_4, - }, { - .range_min = DA9062AA_GPIO_WKUP_MODE, - .range_max = DA9062AA_BUCK4_CONT, - }, { - .range_min = DA9062AA_BUCK3_CONT, - .range_max = DA9062AA_BUCK3_CONT, - }, { - .range_min = DA9062AA_LDO1_CONT, - .range_max = DA9062AA_LDO4_CONT, - }, { - .range_min = DA9062AA_DVC_1, - .range_max = DA9062AA_DVC_1, - }, { - .range_min = DA9062AA_COUNT_S, - .range_max = DA9062AA_ALARM_Y, - }, { - .range_min = DA9062AA_SEQ, - .range_max = DA9062AA_ID_4_3, - }, { - .range_min = DA9062AA_ID_12_11, - .range_max = DA9062AA_ID_16_15, - }, { - .range_min = DA9062AA_ID_22_21, - .range_max = DA9062AA_ID_32_31, - }, { - .range_min = DA9062AA_SEQ_A, - .range_max = DA9062AA_BUCK3_CFG, - }, { - .range_min = DA9062AA_VBUCK2_A, - .range_max = DA9062AA_VBUCK4_A, - }, { - .range_min = DA9062AA_VBUCK3_A, - .range_max = DA9062AA_VBUCK3_A, - }, { - .range_min = DA9062AA_VLDO1_A, - .range_max = DA9062AA_VLDO4_A, - }, { - .range_min = DA9062AA_VBUCK2_B, - .range_max = DA9062AA_VBUCK4_B, - }, { - .range_min = DA9062AA_VBUCK3_B, - .range_max = DA9062AA_VBUCK3_B, - }, { - .range_min = DA9062AA_VLDO1_B, - .range_max = DA9062AA_VLDO4_B, - }, { - .range_min = DA9062AA_BBAT_CONT, - .range_max = DA9062AA_BBAT_CONT, - }, { - .range_min = DA9062AA_GP_ID_0, - .range_max = DA9062AA_GP_ID_19, - }, + regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_PAGE_CON), + regmap_reg_range(DA9062AA_FAULT_LOG, DA9062AA_EVENT_C), + regmap_reg_range(DA9062AA_IRQ_MASK_A, DA9062AA_IRQ_MASK_C), + regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_GPIO_4), + regmap_reg_range(DA9062AA_GPIO_WKUP_MODE, DA9062AA_BUCK4_CONT), + regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT), + regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT), + regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1), + regmap_reg_range(DA9062AA_COUNT_S, DA9062AA_ALARM_Y), + regmap_reg_range(DA9062AA_SEQ, DA9062AA_ID_4_3), + regmap_reg_range(DA9062AA_ID_12_11, DA9062AA_ID_16_15), + regmap_reg_range(DA9062AA_ID_22_21, DA9062AA_ID_32_31), + regmap_reg_range(DA9062AA_SEQ_A, DA9062AA_BUCK3_CFG), + regmap_reg_range(DA9062AA_VBUCK2_A, DA9062AA_VBUCK4_A), + regmap_reg_range(DA9062AA_VBUCK3_A, DA9062AA_VBUCK3_A), + regmap_reg_range(DA9062AA_VLDO1_A, DA9062AA_VLDO4_A), + regmap_reg_range(DA9062AA_VBUCK2_B, DA9062AA_VBUCK4_B), + regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B), + regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B), + regmap_reg_range(DA9062AA_BBAT_CONT, DA9062AA_BBAT_CONT), + regmap_reg_range(DA9062AA_GP_ID_0, DA9062AA_GP_ID_19), }; static const struct regmap_range da9062_aa_volatile_ranges[] = { - { - .range_min = DA9062AA_PAGE_CON, - .range_max = DA9062AA_STATUS_B, - }, { - .range_min = DA9062AA_STATUS_D, - .range_max = DA9062AA_EVENT_C, - }, { - .range_min = DA9062AA_CONTROL_A, - .range_max = DA9062AA_CONTROL_B, - }, { - .range_min = DA9062AA_CONTROL_E, - .range_max = DA9062AA_CONTROL_F, - }, { - .range_min = DA9062AA_BUCK2_CONT, - .range_max = DA9062AA_BUCK4_CONT, - }, { - .range_min = DA9062AA_BUCK3_CONT, - .range_max = DA9062AA_BUCK3_CONT, - }, { - .range_min = DA9062AA_LDO1_CONT, - .range_max = DA9062AA_LDO4_CONT, - }, { - .range_min = DA9062AA_DVC_1, - .range_max = DA9062AA_DVC_1, - }, { - .range_min = DA9062AA_COUNT_S, - .range_max = DA9062AA_SECOND_D, - }, { - .range_min = DA9062AA_SEQ, - .range_max = DA9062AA_SEQ, - }, { - .range_min = DA9062AA_EN_32K, - .range_max = DA9062AA_EN_32K, - }, + regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_STATUS_B), + regmap_reg_range(DA9062AA_STATUS_D, DA9062AA_EVENT_C), + regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_CONTROL_B), + regmap_reg_range(DA9062AA_CONTROL_E, DA9062AA_CONTROL_F), + regmap_reg_range(DA9062AA_BUCK2_CONT, DA9062AA_BUCK4_CONT), + regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT), + regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT), + regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1), + regmap_reg_range(DA9062AA_COUNT_S, DA9062AA_SECOND_D), + regmap_reg_range(DA9062AA_SEQ, DA9062AA_SEQ), + regmap_reg_range(DA9062AA_EN_32K, DA9062AA_EN_32K), }; static const struct regmap_access_table da9062_aa_readable_table = { |
