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authorMoore, Eric Dean <Eric.Moore@lsil.com>2005-05-11 17:46:52 -0600
committerJames Bottomley <jejb@mulgrave.(none)>2005-05-20 15:47:53 -0500
commit3fadc59d603caf70e7a5295158e4f6eb06dffb8f (patch)
tree1f8de49cf6af0972c8cca2cfd13dc5a95e2b79b3 /drivers/message/fusion/mptbase.h
parent793698ce28e20f4736250a9766270368beae5668 (diff)
downloadop-kernel-dev-3fadc59d603caf70e7a5295158e4f6eb06dffb8f.zip
op-kernel-dev-3fadc59d603caf70e7a5295158e4f6eb06dffb8f.tar.gz
[SCSI] fusion - Adding pci recog support for Fibre 949X and 939X chips
* adding pci id support for new Fibre chips, 949X and 939X * adding errata workaround - disabling PIO access except during fwdlb. Signed-off-by: Eric Moore <Eric.Moore@lsil.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/message/fusion/mptbase.h')
-rw-r--r--drivers/message/fusion/mptbase.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/message/fusion/mptbase.h b/drivers/message/fusion/mptbase.h
index 2c4bb69..84ade73 100644
--- a/drivers/message/fusion/mptbase.h
+++ b/drivers/message/fusion/mptbase.h
@@ -562,6 +562,13 @@ typedef struct _MPT_ADAPTER
FCPortPage0_t fc_port_page0[2];
LANPage0_t lan_cnfg_page0;
LANPage1_t lan_cnfg_page1;
+ /*
+ * Description: errata_flag_1064
+ * If a PCIX read occurs within 1 or 2 cycles after the chip receives
+ * a split completion for a read data, an internal address pointer incorrectly
+ * increments by 32 bytes
+ */
+ int errata_flag_1064;
u8 FirstWhoInit;
u8 upload_fw; /* If set, do a fw upload */
u8 reload_fw; /* Force a FW Reload on next reset */
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