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author | Thierry Reding <treding@nvidia.com> | 2017-10-12 16:29:19 +0200 |
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committer | Thierry Reding <treding@nvidia.com> | 2017-12-15 10:12:32 +0100 |
commit | 2a8102dfe0da7dbb61794e6b85dc7ac9271e5fc8 (patch) | |
tree | 2f0e111f2fb5f4797a8bce773f122053278c5ca2 /drivers/memory/tegra | |
parent | 02b0cc52c0c3c89641276cb1e7abddd35e036923 (diff) | |
download | op-kernel-dev-2a8102dfe0da7dbb61794e6b85dc7ac9271e5fc8.zip op-kernel-dev-2a8102dfe0da7dbb61794e6b85dc7ac9271e5fc8.tar.gz |
memory: tegra: Create SMMU display groups
Create SMMU display groups for Tegra30, Tegra114, Tegra124 and Tegra210.
This allows the display controllers on these devices to share the same
IOMMU domain using the standard IOMMU group mechanism.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory/tegra')
-rw-r--r-- | drivers/memory/tegra/tegra114.c | 15 | ||||
-rw-r--r-- | drivers/memory/tegra/tegra124.c | 17 | ||||
-rw-r--r-- | drivers/memory/tegra/tegra210.c | 15 | ||||
-rw-r--r-- | drivers/memory/tegra/tegra30.c | 15 |
4 files changed, 62 insertions, 0 deletions
diff --git a/drivers/memory/tegra/tegra114.c b/drivers/memory/tegra/tegra114.c index ba8fff3..b20e6e3 100644 --- a/drivers/memory/tegra/tegra114.c +++ b/drivers/memory/tegra/tegra114.c @@ -912,11 +912,26 @@ static const struct tegra_smmu_swgroup tegra114_swgroups[] = { { .name = "tsec", .swgroup = TEGRA_SWGROUP_TSEC, .reg = 0x294 }, }; +static const unsigned int tegra114_group_display[] = { + TEGRA_SWGROUP_DC, + TEGRA_SWGROUP_DCB, +}; + +static const struct tegra_smmu_group_soc tegra114_groups[] = { + { + .name = "display", + .swgroups = tegra114_group_display, + .num_swgroups = ARRAY_SIZE(tegra114_group_display), + }, +}; + static const struct tegra_smmu_soc tegra114_smmu_soc = { .clients = tegra114_mc_clients, .num_clients = ARRAY_SIZE(tegra114_mc_clients), .swgroups = tegra114_swgroups, .num_swgroups = ARRAY_SIZE(tegra114_swgroups), + .groups = tegra114_groups, + .num_groups = ARRAY_SIZE(tegra114_groups), .supports_round_robin_arbitration = false, .supports_request_limit = false, .num_tlb_lines = 32, diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra124.c index 5a58e44..8b6360e 100644 --- a/drivers/memory/tegra/tegra124.c +++ b/drivers/memory/tegra/tegra124.c @@ -999,12 +999,27 @@ static const struct tegra_smmu_swgroup tegra124_swgroups[] = { { .name = "vi", .swgroup = TEGRA_SWGROUP_VI, .reg = 0x280 }, }; +static const unsigned int tegra124_group_display[] = { + TEGRA_SWGROUP_DC, + TEGRA_SWGROUP_DCB, +}; + +static const struct tegra_smmu_group_soc tegra124_groups[] = { + { + .name = "display", + .swgroups = tegra124_group_display, + .num_swgroups = ARRAY_SIZE(tegra124_group_display), + }, +}; + #ifdef CONFIG_ARCH_TEGRA_124_SOC static const struct tegra_smmu_soc tegra124_smmu_soc = { .clients = tegra124_mc_clients, .num_clients = ARRAY_SIZE(tegra124_mc_clients), .swgroups = tegra124_swgroups, .num_swgroups = ARRAY_SIZE(tegra124_swgroups), + .groups = tegra124_groups, + .num_groups = ARRAY_SIZE(tegra124_groups), .supports_round_robin_arbitration = true, .supports_request_limit = true, .num_tlb_lines = 32, @@ -1029,6 +1044,8 @@ static const struct tegra_smmu_soc tegra132_smmu_soc = { .num_clients = ARRAY_SIZE(tegra124_mc_clients), .swgroups = tegra124_swgroups, .num_swgroups = ARRAY_SIZE(tegra124_swgroups), + .groups = tegra124_groups, + .num_groups = ARRAY_SIZE(tegra124_groups), .supports_round_robin_arbitration = true, .supports_request_limit = true, .num_tlb_lines = 32, diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c index 5e144ab..d398bcd 100644 --- a/drivers/memory/tegra/tegra210.c +++ b/drivers/memory/tegra/tegra210.c @@ -1059,11 +1059,26 @@ static const struct tegra_smmu_swgroup tegra210_swgroups[] = { { .name = "tsecb", .swgroup = TEGRA_SWGROUP_TSECB, .reg = 0xad4 }, }; +static const unsigned int tegra210_group_display[] = { + TEGRA_SWGROUP_DC, + TEGRA_SWGROUP_DCB, +}; + +static const struct tegra_smmu_group_soc tegra210_groups[] = { + { + .name = "display", + .swgroups = tegra210_group_display, + .num_swgroups = ARRAY_SIZE(tegra210_group_display), + }, +}; + static const struct tegra_smmu_soc tegra210_smmu_soc = { .clients = tegra210_mc_clients, .num_clients = ARRAY_SIZE(tegra210_mc_clients), .swgroups = tegra210_swgroups, .num_swgroups = ARRAY_SIZE(tegra210_swgroups), + .groups = tegra210_groups, + .num_groups = ARRAY_SIZE(tegra210_groups), .supports_round_robin_arbitration = true, .supports_request_limit = true, .num_tlb_lines = 32, diff --git a/drivers/memory/tegra/tegra30.c b/drivers/memory/tegra/tegra30.c index b447378..d756c83 100644 --- a/drivers/memory/tegra/tegra30.c +++ b/drivers/memory/tegra/tegra30.c @@ -934,11 +934,26 @@ static const struct tegra_smmu_swgroup tegra30_swgroups[] = { { .name = "isp", .swgroup = TEGRA_SWGROUP_ISP, .reg = 0x258 }, }; +static const unsigned int tegra30_group_display[] = { + TEGRA_SWGROUP_DC, + TEGRA_SWGROUP_DCB, +}; + +static const struct tegra_smmu_group_soc tegra30_groups[] = { + { + .name = "display", + .swgroups = tegra30_group_display, + .num_swgroups = ARRAY_SIZE(tegra30_group_display), + }, +}; + static const struct tegra_smmu_soc tegra30_smmu_soc = { .clients = tegra30_mc_clients, .num_clients = ARRAY_SIZE(tegra30_mc_clients), .swgroups = tegra30_swgroups, .num_swgroups = ARRAY_SIZE(tegra30_swgroups), + .groups = tegra30_groups, + .num_groups = ARRAY_SIZE(tegra30_groups), .supports_round_robin_arbitration = false, .supports_request_limit = false, .num_tlb_lines = 16, |