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| author | Ingo Molnar <mingo@elte.hu> | 2009-04-24 10:11:18 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-04-24 10:11:23 +0200 |
| commit | 416dfdcdb894432547ead4fcb9fa6a36b396059e (patch) | |
| tree | 8033fdda07397a59c5fa98c88927040906ce6c1a /drivers/media/video/au0828/au0828-reg.h | |
| parent | 56449f437add737a1e5e1cb7e00f63ac8ead1938 (diff) | |
| parent | 091069740304c979f957ceacec39c461d0192158 (diff) | |
| download | op-kernel-dev-416dfdcdb894432547ead4fcb9fa6a36b396059e.zip op-kernel-dev-416dfdcdb894432547ead4fcb9fa6a36b396059e.tar.gz | |
Merge commit 'v2.6.30-rc3' into tracing/hw-branch-tracing
Conflicts:
arch/x86/kernel/ptrace.c
Merge reason: fix the conflict above, and also pick up the CONFIG_BROKEN
dependency change from upstream so that we can remove it
here.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/media/video/au0828/au0828-reg.h')
| -rw-r--r-- | drivers/media/video/au0828/au0828-reg.h | 35 |
1 files changed, 28 insertions, 7 deletions
diff --git a/drivers/media/video/au0828/au0828-reg.h b/drivers/media/video/au0828/au0828-reg.h index b15e4a3..c39f3d2 100644 --- a/drivers/media/video/au0828/au0828-reg.h +++ b/drivers/media/video/au0828/au0828-reg.h @@ -30,15 +30,36 @@ #define AU0828_SENSORCTRL_100 0x100 #define AU0828_SENSORCTRL_VBI_103 0x103 -#define REG_200 0x200 -#define REG_201 0x201 -#define REG_202 0x202 -#define REG_203 0x203 -#define REG_205 0x205 -#define REG_209 0x209 -#define REG_2FF 0x2ff +/* I2C registers */ +#define AU0828_I2C_TRIGGER_200 0x200 +#define AU0828_I2C_STATUS_201 0x201 +#define AU0828_I2C_CLK_DIVIDER_202 0x202 +#define AU0828_I2C_DEST_ADDR_203 0x203 +#define AU0828_I2C_WRITE_FIFO_205 0x205 +#define AU0828_I2C_READ_FIFO_209 0x209 +#define AU0828_I2C_MULTIBYTE_MODE_2FF 0x2ff /* Audio registers */ #define AU0828_AUDIOCTRL_50C 0x50C #define REG_600 0x600 + +/*********************************************************************/ +/* Here are constants for values associated with the above registers */ + +/* I2C Trigger (Reg 0x200) */ +#define AU0828_I2C_TRIGGER_WRITE 0x01 +#define AU0828_I2C_TRIGGER_READ 0x20 +#define AU0828_I2C_TRIGGER_HOLD 0x40 + +/* I2C Status (Reg 0x201) */ +#define AU0828_I2C_STATUS_READ_DONE 0x01 +#define AU0828_I2C_STATUS_NO_READ_ACK 0x02 +#define AU0828_I2C_STATUS_WRITE_DONE 0x04 +#define AU0828_I2C_STATUS_NO_WRITE_ACK 0x08 +#define AU0828_I2C_STATUS_BUSY 0x10 + +/* I2C Clock Divider (Reg 0x202) */ +#define AU0828_I2C_CLK_250KHZ 0x07 +#define AU0828_I2C_CLK_100KHZ 0x14 +#define AU0828_I2C_CLK_30KHZ 0x40 |
