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authorJacek Anaszewski <j.anaszewski@samsung.com>2014-07-10 06:00:39 -0300
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-07-21 15:35:15 -0300
commitd19f405a5a8d2ed942b40f8cf7929a5a50d0cc59 (patch)
tree3b894f992f93397200629fe6a63efeb0640c84b4 /drivers/media/platform/s5p-mfc
parent69b9fe22b19b31d9de96d4a181f7206fd29ab743 (diff)
downloadop-kernel-dev-d19f405a5a8d2ed942b40f8cf7929a5a50d0cc59.zip
op-kernel-dev-d19f405a5a8d2ed942b40f8cf7929a5a50d0cc59.tar.gz
[media] s5p-mfc: Fix selective sclk_mfc init
fc906b6d "Remove special clock usage in driver" removed initialization of MFC special clock, arguing that there's no need to do it explicitly, since it's one of MFC gate clock's dependencies and gets enabled along with it. However, there's no promise of keeping this hierarchy across Exynos SoC releases, therefore this approach fails to provide a stable, portable solution. Out of all MFC versions, only v6 doesn't use special clock at all. For other versions log a message only in case clk_get fails, as not all the devices with the same MFC version require initializing the clock explicitly. Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/platform/s5p-mfc')
-rw-r--r--drivers/media/platform/s5p-mfc/s5p_mfc_pm.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c b/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
index 11d5f1d..b6a8be9 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_pm.c
@@ -21,6 +21,8 @@
#include "s5p_mfc_pm.h"
#define MFC_GATE_CLK_NAME "mfc"
+#define MFC_SCLK_NAME "sclk-mfc"
+#define MFC_SCLK_RATE (200 * 1000000)
#define CLK_DEBUG
@@ -50,6 +52,20 @@ int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
goto err_p_ip_clk;
}
+ if (dev->variant->version != MFC_VERSION_V6) {
+ pm->clock = clk_get(&dev->plat_dev->dev, MFC_SCLK_NAME);
+ if (IS_ERR(pm->clock)) {
+ mfc_info("Failed to get MFC special clock control\n");
+ } else {
+ clk_set_rate(pm->clock, MFC_SCLK_RATE);
+ ret = clk_prepare_enable(pm->clock);
+ if (ret) {
+ mfc_err("Failed to enable MFC special clock\n");
+ goto err_s_clk;
+ }
+ }
+ }
+
atomic_set(&pm->power, 0);
#ifdef CONFIG_PM_RUNTIME
pm->device = &dev->plat_dev->dev;
@@ -59,6 +75,9 @@ int s5p_mfc_init_pm(struct s5p_mfc_dev *dev)
atomic_set(&clk_ref, 0);
#endif
return 0;
+
+err_s_clk:
+ clk_put(pm->clock);
err_p_ip_clk:
clk_put(pm->clock_gate);
err_g_ip_clk:
@@ -67,6 +86,11 @@ err_g_ip_clk:
void s5p_mfc_final_pm(struct s5p_mfc_dev *dev)
{
+ if (dev->variant->version != MFC_VERSION_V6 &&
+ pm->clock) {
+ clk_disable_unprepare(pm->clock);
+ clk_put(pm->clock);
+ }
clk_unprepare(pm->clock_gate);
clk_put(pm->clock_gate);
#ifdef CONFIG_PM_RUNTIME
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