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authorSylwester Nawrocki <s.nawrocki@samsung.com>2013-03-20 15:31:03 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-04-04 20:23:24 -0300
commite90ad659cde4d11ccbc935adcfe018799afcc22d (patch)
tree6210875ebfa690b63a44e8eba5799ca756310de3 /drivers/media/platform/exynos4-is/fimc-lite-reg.c
parent9c8399c86cbfce767fb32459f8e0eb33e087f910 (diff)
downloadop-kernel-dev-e90ad659cde4d11ccbc935adcfe018799afcc22d.zip
op-kernel-dev-e90ad659cde4d11ccbc935adcfe018799afcc22d.tar.gz
[media] exynos4-is: Allow colorspace conversion at FIMC-LITE
The FIMC-LITE output DMA allows to configure different YUV order than the order at the camera input interface. Thus there is some limited colorspace conversion possible. This patch makes the color format variable be per FIMC-LITE input/output, rather than a global per device. This also fixes incorrect behavior where color format at the FIMC-LITE.N subdev's source pad is modified by VIDIOC_S_FMT ioctl on the related video node. YUV order definitions are corrected so that we use notation: | byte3 | byte2 | byte1 | byte0 -------+-------+-------+-------+------ YCBYCR | CR | Y | CB | Y YCRYCB | CB | Y | CR | Y CBYCRY | Y | CR | Y | CB CRYCBY | Y | CB | Y | CR Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/platform/exynos4-is/fimc-lite-reg.c')
-rw-r--r--drivers/media/platform/exynos4-is/fimc-lite-reg.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/media/platform/exynos4-is/fimc-lite-reg.c b/drivers/media/platform/exynos4-is/fimc-lite-reg.c
index ac9663c..8cc0d39 100644
--- a/drivers/media/platform/exynos4-is/fimc-lite-reg.c
+++ b/drivers/media/platform/exynos4-is/fimc-lite-reg.c
@@ -127,7 +127,7 @@ static const u32 src_pixfmt_map[8][3] = {
/* Set camera input pixel format and resolution */
void flite_hw_set_source_format(struct fimc_lite *dev, struct flite_frame *f)
{
- enum v4l2_mbus_pixelcode pixelcode = dev->fmt->mbus_code;
+ enum v4l2_mbus_pixelcode pixelcode = f->fmt->mbus_code;
int i = ARRAY_SIZE(src_pixfmt_map);
u32 cfg;
@@ -227,7 +227,7 @@ static void flite_hw_set_out_order(struct fimc_lite *dev, struct flite_frame *f)
int i = ARRAY_SIZE(pixcode);
while (--i >= 0)
- if (pixcode[i][0] == dev->fmt->mbus_code)
+ if (pixcode[i][0] == f->fmt->mbus_code)
break;
cfg &= ~FLITE_REG_CIODMAFMT_YCBCR_ORDER_MASK;
writel(cfg | pixcode[i][1], dev->regs + FLITE_REG_CIODMAFMT);
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