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| author | Hans Verkuil <hans.verkuil@cisco.com> | 2015-05-21 09:37:40 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@osg.samsung.com> | 2015-05-30 11:19:30 -0300 |
| commit | 99cabb187100e5bae12ec835431a2868e5d9afc9 (patch) | |
| tree | c55ebd141479b5d102dbc00489c465b74d047268 /drivers/media/pci/cobalt/cobalt-v4l2.c | |
| parent | 86bad00a2fd5327925417eb05a2b3d1819c42a70 (diff) | |
| download | op-kernel-dev-99cabb187100e5bae12ec835431a2868e5d9afc9.zip op-kernel-dev-99cabb187100e5bae12ec835431a2868e5d9afc9.tar.gz | |
[media] cobalt: fix 64-bit division link error
[linuxtv-media:master 1023/1029] ERROR: "__aeabi_uldivmod" [drivers/media/pci/cobalt/cobalt.ko] undefined!
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'drivers/media/pci/cobalt/cobalt-v4l2.c')
| -rw-r--r-- | drivers/media/pci/cobalt/cobalt-v4l2.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/media/pci/cobalt/cobalt-v4l2.c b/drivers/media/pci/cobalt/cobalt-v4l2.c index bf80f11..6e8d25b 100644 --- a/drivers/media/pci/cobalt/cobalt-v4l2.c +++ b/drivers/media/pci/cobalt/cobalt-v4l2.c @@ -22,6 +22,7 @@ #include <linux/dma-mapping.h> #include <linux/delay.h> +#include <linux/math64.h> #include <linux/pci.h> #include <linux/v4l2-dv-timings.h> @@ -314,8 +315,8 @@ static int cobalt_start_streaming(struct vb2_queue *q, unsigned int count) cvi->frame_height = bt->height; tot_size = V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt); vmr->hsync_timeout_val = - ((u64)V4L2_DV_BT_FRAME_WIDTH(bt) * COBALT_CLK * 4) / - bt->pixelclock; + div_u64((u64)V4L2_DV_BT_FRAME_WIDTH(bt) * COBALT_CLK * 4, + bt->pixelclock); vmr->control = M00233_CONTROL_BITMAP_ENABLE_MEASURE_MSK; clkloss->ref_clk_cnt_val = fw->clk_freq / 1000000; /* The lower bound for the clock frequency is 0.5% lower as is @@ -324,7 +325,7 @@ static int cobalt_start_streaming(struct vb2_queue *q, unsigned int count) (((u64)bt->pixelclock * 995) / 1000) / 1000000; /* will be enabled after the first frame has been received */ fw->active_length = bt->width * bt->height; - fw->total_length = ((u64)fw->clk_freq * tot_size) / bt->pixelclock; + fw->total_length = div_u64((u64)fw->clk_freq * tot_size, bt->pixelclock); vmr->irq_triggers = M00233_IRQ_TRIGGERS_BITMAP_VACTIVE_AREA_MSK | M00233_IRQ_TRIGGERS_BITMAP_HACTIVE_AREA_MSK; cvi->control = 0; |
