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| author | Arnd Bergmann <arnd@arndb.de> | 2013-06-21 15:28:16 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-06-21 15:28:16 +0200 |
| commit | 5b520c94b30c643f24f43c79aa638c0a1fe3b15c (patch) | |
| tree | 84f50948f368e87153dba160c77ba7e657445366 /drivers/irqchip | |
| parent | 076919a6e0154f06221e02f9e58b14eb1ed9e019 (diff) | |
| parent | c4fa4946f177ae214523586cd794ac18d34b1430 (diff) | |
| download | op-kernel-dev-5b520c94b30c643f24f43c79aa638c0a1fe3b15c.zip op-kernel-dev-5b520c94b30c643f24f43c79aa638c0a1fe3b15c.tar.gz | |
Merge tag 'renesas-dt2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Second Round of Renesas ARM-based SoC DT updates for v3.11
* Increased DT coverage for renesas-intc-irqpin
by Guennadi Liakhovetski
* Clean up of address format used in sh73a0 dtsi file
by Guennadi Liakhovetski
* tag 'renesas-dt2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: irqpin: add a DT property to enable masking on parent
ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/irqchip')
| -rw-r--r-- | drivers/irqchip/irq-renesas-intc-irqpin.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index 5a68e5a..82cec63 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c @@ -18,6 +18,7 @@ */ #include <linux/init.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/interrupt.h> @@ -347,8 +348,14 @@ static int intc_irqpin_probe(struct platform_device *pdev) } /* deal with driver instance configuration */ - if (pdata) + if (pdata) { memcpy(&p->config, pdata, sizeof(*pdata)); + } else { + of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width", + &p->config.sense_bitfield_width); + p->config.control_parent = of_property_read_bool(pdev->dev.of_node, + "control-parent"); + } if (!p->config.sense_bitfield_width) p->config.sense_bitfield_width = 4; /* default to 4 bits */ |
