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author | André Goddard Rosa <andre.goddard@gmail.com> | 2009-11-14 13:09:05 -0200 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2009-12-04 15:39:55 +0100 |
commit | af901ca181d92aac3a7dc265144a9081a86d8f39 (patch) | |
tree | 380054af22521144fbe1364c3bcd55ad24c9bde4 /drivers/infiniband/hw/ipath/ipath_sd7220.c | |
parent | 972b94ffb90ea6d20c589d9a47215df103388ddd (diff) | |
download | op-kernel-dev-af901ca181d92aac3a7dc265144a9081a86d8f39.zip op-kernel-dev-af901ca181d92aac3a7dc265144a9081a86d8f39.tar.gz |
tree-wide: fix assorted typos all over the place
That is "success", "unknown", "through", "performance", "[re|un]mapping"
, "access", "default", "reasonable", "[con]currently", "temperature"
, "channel", "[un]used", "application", "example","hierarchy", "therefore"
, "[over|under]flow", "contiguous", "threshold", "enough" and others.
Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_sd7220.c')
-rw-r--r-- | drivers/infiniband/hw/ipath/ipath_sd7220.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_sd7220.c b/drivers/infiniband/hw/ipath/ipath_sd7220.c index aa47eb5..2a68d9f 100644 --- a/drivers/infiniband/hw/ipath/ipath_sd7220.c +++ b/drivers/infiniband/hw/ipath/ipath_sd7220.c @@ -614,7 +614,7 @@ static int epb_trans(struct ipath_devdata *dd, u16 reg, u64 i_val, u64 *o_vp) * @wd: Write Data - value to set in register * @mask: ones where data should be spliced into reg. * - * Basic register read/modify/write, with un-needed acesses elided. That is, + * Basic register read/modify/write, with un-needed accesses elided. That is, * a mask of zero will prevent write, while a mask of 0xFF will prevent read. * returns current (presumed, if a write was done) contents of selected * register, or <0 if errors. @@ -989,7 +989,7 @@ static struct rxeq_init { /* Set DFELTHFDR/HDR thresholds */ RXEQ_VAL(7, 8, 0, 0, 0, 0), /* FDR */ RXEQ_VAL(7, 0x21, 0, 0, 0, 0), /* HDR */ - /* Set TLTHFDR/HDR theshold */ + /* Set TLTHFDR/HDR threshold */ RXEQ_VAL(7, 9, 2, 2, 2, 2), /* FDR */ RXEQ_VAL(7, 0x23, 2, 2, 2, 2), /* HDR */ /* Set Preamp setting 2 (ZFR/ZCNT) */ |