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author | Hariprasad Shenai <hariprasad@chelsio.com> | 2014-07-14 21:34:51 +0530 |
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committer | David S. Miller <davem@davemloft.net> | 2014-07-15 16:25:16 -0700 |
commit | 04e10e2164fcfa05e14eff3c2757a5097f11d258 (patch) | |
tree | 2212ddad781d45e0ca93165b4cefc48ac321b897 /drivers/infiniband/hw/cxgb4/device.c | |
parent | 5ee2c941b5969eb1b5592f9731b3ee76a784641f (diff) | |
download | op-kernel-dev-04e10e2164fcfa05e14eff3c2757a5097f11d258.zip op-kernel-dev-04e10e2164fcfa05e14eff3c2757a5097f11d258.tar.gz |
iw_cxgb4: Detect Ing. Padding Boundary at run-time
Updates iw_cxgb4 to determine the Ingress Padding Boundary from
cxgb4_lld_info, and take subsequent actions.
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/infiniband/hw/cxgb4/device.c')
-rw-r--r-- | drivers/infiniband/hw/cxgb4/device.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c index dd93aad..88291ef 100644 --- a/drivers/infiniband/hw/cxgb4/device.c +++ b/drivers/infiniband/hw/cxgb4/device.c @@ -768,6 +768,27 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) } devp->rdev.lldi = *infop; + /* init various hw-queue params based on lld info */ + PDBG("%s: Ing. padding boundary is %d, egrsstatuspagesize = %d\n", + __func__, devp->rdev.lldi.sge_ingpadboundary, + devp->rdev.lldi.sge_egrstatuspagesize); + + devp->rdev.hw_queue.t4_eq_status_entries = + devp->rdev.lldi.sge_ingpadboundary > 64 ? 2 : 1; + devp->rdev.hw_queue.t4_max_eq_size = + 65520 - devp->rdev.hw_queue.t4_eq_status_entries; + devp->rdev.hw_queue.t4_max_iq_size = 65520 - 1; + devp->rdev.hw_queue.t4_max_rq_size = + 8192 - devp->rdev.hw_queue.t4_eq_status_entries; + devp->rdev.hw_queue.t4_max_sq_size = + devp->rdev.hw_queue.t4_max_eq_size - 1; + devp->rdev.hw_queue.t4_max_qp_depth = + devp->rdev.hw_queue.t4_max_rq_size - 1; + devp->rdev.hw_queue.t4_max_cq_depth = + devp->rdev.hw_queue.t4_max_iq_size - 1; + devp->rdev.hw_queue.t4_stat_len = + devp->rdev.lldi.sge_egrstatuspagesize; + /* * For T5 devices, we map all of BAR2 with WC. * For T4 devices with onchip qp mem, we map only that part |