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| author | William Breathitt Gray <vilhelm.gray@gmail.com> | 2016-11-28 16:22:44 -0500 |
|---|---|---|
| committer | Jonathan Cameron <jic23@kernel.org> | 2016-12-03 10:00:24 +0000 |
| commit | 47af2c676ae1e84140225d261a00bdf88f1f9f7e (patch) | |
| tree | 914eb58c11481f39d8acca41ac3a1e9ae1e70593 /drivers/iio | |
| parent | af8bc2fb99d4eea2d026d42db18abc5f3876936a (diff) | |
| download | op-kernel-dev-47af2c676ae1e84140225d261a00bdf88f1f9f7e.zip op-kernel-dev-47af2c676ae1e84140225d261a00bdf88f1f9f7e.tar.gz | |
iio: 104-quad-8: Fix index control configuration
The LS7266R1 requires bits 5 & 6 to be high in order to select the Index
Control Register. This patch fixes a typo that incorrectly selects the
Input/Output Control Register where the Index Control Register was
desired.
Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio')
| -rw-r--r-- | drivers/iio/counter/104-quad-8.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iio/counter/104-quad-8.c b/drivers/iio/counter/104-quad-8.c index 2d2ee35..c0a69d7 100644 --- a/drivers/iio/counter/104-quad-8.c +++ b/drivers/iio/counter/104-quad-8.c @@ -362,7 +362,7 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev, priv->synchronous_mode[chan->channel] = synchronous_mode; /* Load Index Control configuration to Index Control Register */ - outb(0x40 | idr_cfg, base_offset); + outb(0x60 | idr_cfg, base_offset); return 0; } @@ -444,7 +444,7 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev, priv->index_polarity[chan->channel] = index_polarity; /* Load Index Control configuration to Index Control Register */ - outb(0x40 | idr_cfg, base_offset); + outb(0x60 | idr_cfg, base_offset); return 0; } |
