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| author | Herbert Xu <herbert@gondor.apana.org.au> | 2017-01-12 16:10:00 +0800 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2017-01-12 16:10:00 +0800 |
| commit | 4cf0662888026d5c1b62ed3fa8dc048a2ff2e124 (patch) | |
| tree | a5c92c5024c599a00bfd8d402d2b7b0a619b0259 /drivers/iio/counter/104-quad-8.c | |
| parent | c821f6ab2e47946f35ee2f30781c5185e5d07f65 (diff) | |
| parent | a121103c922847ba5010819a3f250f1f7fc84ab8 (diff) | |
| download | op-kernel-dev-4cf0662888026d5c1b62ed3fa8dc048a2ff2e124.zip op-kernel-dev-4cf0662888026d5c1b62ed3fa8dc048a2ff2e124.tar.gz | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
Merging 4.10-rc3 so that the cryptodev tree builds on ARM64.
Diffstat (limited to 'drivers/iio/counter/104-quad-8.c')
| -rw-r--r-- | drivers/iio/counter/104-quad-8.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/iio/counter/104-quad-8.c b/drivers/iio/counter/104-quad-8.c index 2d2ee35..a5913e9 100644 --- a/drivers/iio/counter/104-quad-8.c +++ b/drivers/iio/counter/104-quad-8.c @@ -153,7 +153,7 @@ static int quad8_write_raw(struct iio_dev *indio_dev, ior_cfg = val | priv->preset_enable[chan->channel] << 1; /* Load I/O control configuration */ - outb(0x40 | ior_cfg, base_offset); + outb(0x40 | ior_cfg, base_offset + 1); return 0; case IIO_CHAN_INFO_SCALE: @@ -233,7 +233,7 @@ static ssize_t quad8_read_set_to_preset_on_index(struct iio_dev *indio_dev, const struct quad8_iio *const priv = iio_priv(indio_dev); return snprintf(buf, PAGE_SIZE, "%u\n", - priv->preset_enable[chan->channel]); + !priv->preset_enable[chan->channel]); } static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, @@ -241,7 +241,7 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, size_t len) { struct quad8_iio *const priv = iio_priv(indio_dev); - const int base_offset = priv->base + 2 * chan->channel; + const int base_offset = priv->base + 2 * chan->channel + 1; bool preset_enable; int ret; unsigned int ior_cfg; @@ -250,6 +250,9 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, if (ret) return ret; + /* Preset enable is active low in Input/Output Control register */ + preset_enable = !preset_enable; + priv->preset_enable[chan->channel] = preset_enable; ior_cfg = priv->ab_enable[chan->channel] | @@ -362,7 +365,7 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev, priv->synchronous_mode[chan->channel] = synchronous_mode; /* Load Index Control configuration to Index Control Register */ - outb(0x40 | idr_cfg, base_offset); + outb(0x60 | idr_cfg, base_offset); return 0; } @@ -444,7 +447,7 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev, priv->index_polarity[chan->channel] = index_polarity; /* Load Index Control configuration to Index Control Register */ - outb(0x40 | idr_cfg, base_offset); + outb(0x60 | idr_cfg, base_offset); return 0; } |
