diff options
author | David Moore <dcm@acm.org> | 2007-02-03 03:09:09 -0500 |
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committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2007-02-08 21:36:18 +0100 |
commit | a5782010b4e75cba571357efaa27df22a89427c2 (patch) | |
tree | e4ecf091108230c6f65b221507ac0b7902154891 /drivers/ieee1394 | |
parent | 0fe4c6fcacb28bda75b31f63d3629f640a6b9bf9 (diff) | |
download | op-kernel-dev-a5782010b4e75cba571357efaa27df22a89427c2.zip op-kernel-dev-a5782010b4e75cba571357efaa27df22a89427c2.tar.gz |
ieee1394: video1394: DMA fix
This together with the phys_to_virt fix in lib/swiotlb.c::swiotlb_sync_sg
fixes video1394 DMA on machines with DMA bounce buffers, especially Intel
x86-64 machines with > 3GB RAM.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Signed-off-by: David Moore <dcm@acm.org>
Tested-by: Nicolas Turro <Nicolas.Turro@inrialpes.fr>
Diffstat (limited to 'drivers/ieee1394')
-rw-r--r-- | drivers/ieee1394/video1394.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/ieee1394/video1394.c b/drivers/ieee1394/video1394.c index 598b19f..f4d1ec00 100644 --- a/drivers/ieee1394/video1394.c +++ b/drivers/ieee1394/video1394.c @@ -489,6 +489,9 @@ static void wakeup_dma_ir_ctx(unsigned long l) reset_ir_status(d, i); d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY; do_gettimeofday(&d->buffer_time[d->buffer_prg_assignment[i]]); + dma_region_sync_for_cpu(&d->dma, + d->buffer_prg_assignment[i] * d->buf_size, + d->buf_size); } } @@ -1096,6 +1099,8 @@ static long video1394_ioctl(struct file *file, DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d", d->ctx); put_timestamp(ohci, d, d->last_buffer); + dma_region_sync_for_device(&d->dma, + v.buffer * d->buf_size, d->buf_size); /* Tell the controller where the first program is */ reg_write(ohci, d->cmdPtr, @@ -1111,6 +1116,9 @@ static long video1394_ioctl(struct file *file, "Waking up iso transmit dma ctx=%d", d->ctx); put_timestamp(ohci, d, d->last_buffer); + dma_region_sync_for_device(&d->dma, + v.buffer * d->buf_size, d->buf_size); + reg_write(ohci, d->ctrlSet, 0x1000); } } |