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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-11 23:54:02 +0200
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-11 23:54:02 +0200
commit8f4dd2e42637fd61a6366d2cace69091926eaa15 (patch)
tree38dc8e475afc27c575ff7f3701e57d5c9e3a9be9 /drivers/ide/ppc
parent0d3be723cb6432e384267d0fe83ee0bae5e17846 (diff)
downloadop-kernel-dev-8f4dd2e42637fd61a6366d2cace69091926eaa15.zip
op-kernel-dev-8f4dd2e42637fd61a6366d2cace69091926eaa15.tar.gz
ide: use only ->set_pio_mode method for programming PIO modes (take 2)
Use ->set_pio_mode method to program PIO modes in ide_set_xfer_rate() (the only place which used ->speedproc to program PIO modes) and remove handling of PIO modes from all ->speedproc implementations. v2: * Fix pmac_ide_tune_chipset() comment. There should be no functionality changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/ppc')
-rw-r--r--drivers/ide/ppc/pmac.c9
1 files changed, 1 insertions, 8 deletions
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 4da2518..f759a53 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -917,7 +917,7 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
/*
* Speedproc. This function is called by the core to set any of the standard
- * timing (PIO, MDMA or UDMA) to both the drive and the controller.
+ * DMA timing (MDMA or UDMA) to both the drive and the controller.
* You may notice we don't use this function on normal "dma check" operation,
* our dedicated function is more precise as it uses the drive provided
* cycle time value. We should probably fix this one to deal with that too...
@@ -964,13 +964,6 @@ static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
case XFER_SW_DMA_0:
return 1;
#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
- case XFER_PIO_4:
- case XFER_PIO_3:
- case XFER_PIO_2:
- case XFER_PIO_1:
- case XFER_PIO_0:
- pmac_ide_set_pio_mode(drive, speed & 0x07);
- return 0;
default:
ret = 1;
}
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