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author | Manuel Lauss <manuel.lauss@googlemail.com> | 2011-08-18 11:11:58 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-10-24 23:34:24 +0100 |
commit | d4f07ae748539d792162a9aa56f192c3992cb3fb (patch) | |
tree | 6f87cb57e87ebc4a76fa377633da00d404ac652e /drivers/ide/au1xxx-ide.c | |
parent | 7517de348663b08a808aff44b5300e817157a568 (diff) | |
download | op-kernel-dev-d4f07ae748539d792162a9aa56f192c3992cb3fb.zip op-kernel-dev-d4f07ae748539d792162a9aa56f192c3992cb3fb.tar.gz |
MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header dep
au1xxx-ide uses defines from the pb1200/db1200 headers:
get DBDMA ID through platform resource information,
hardcode register spacing. The only 2 users of this driver (and
the only boards it can really work on realiably) use the same
register layout.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-ide@vger.kernel.org
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: linux-ide@vger.kernel.org
Acked-by: David S. Miller <davem@davemloft.net>
Patchwork: https://patchwork.linux-mips.org/patch/2716/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/ide/au1xxx-ide.c')
-rw-r--r-- | drivers/ide/au1xxx-ide.c | 44 |
1 files changed, 26 insertions, 18 deletions
diff --git a/drivers/ide/au1xxx-ide.c b/drivers/ide/au1xxx-ide.c index b26c234..c778373 100644 --- a/drivers/ide/au1xxx-ide.c +++ b/drivers/ide/au1xxx-ide.c @@ -43,6 +43,10 @@ #define DRV_NAME "au1200-ide" #define DRV_AUTHOR "Enrico Walther <enrico.walther@amd.com> / Pete Popov <ppopov@embeddedalley.com>" +#ifndef IDE_REG_SHIFT +#define IDE_REG_SHIFT 5 +#endif + /* enable the burstmode in the dbdma */ #define IDE_AU1XXX_BURSTMODE 1 @@ -317,10 +321,11 @@ static void auide_ddma_rx_callback(int irq, void *param) } #endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */ -static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, u32 devwidth, u32 flags) +static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, + u32 devwidth, u32 flags, u32 regbase) { dev->dev_id = dev_id; - dev->dev_physaddr = (u32)IDE_PHYS_ADDR; + dev->dev_physaddr = CPHYSADDR(regbase); dev->dev_intlevel = 0; dev->dev_intpolarity = 0; dev->dev_tsize = tsize; @@ -344,7 +349,7 @@ static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d) dbdev_tab_t source_dev_tab, target_dev_tab; u32 dev_id, tsize, devwidth, flags; - dev_id = IDE_DDMA_REQ; + dev_id = hwif->ddma_id; tsize = 8; /* 1 */ devwidth = 32; /* 16 */ @@ -356,20 +361,17 @@ static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d) #endif /* setup dev_tab for tx channel */ - auide_init_dbdma_dev( &source_dev_tab, - dev_id, - tsize, devwidth, DEV_FLAGS_OUT | flags); + auide_init_dbdma_dev(&source_dev_tab, dev_id, tsize, devwidth, + DEV_FLAGS_OUT | flags, auide->regbase); auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab ); - auide_init_dbdma_dev( &source_dev_tab, - dev_id, - tsize, devwidth, DEV_FLAGS_IN | flags); + auide_init_dbdma_dev(&source_dev_tab, dev_id, tsize, devwidth, + DEV_FLAGS_IN | flags, auide->regbase); auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab ); /* We also need to add a target device for the DMA */ - auide_init_dbdma_dev( &target_dev_tab, - (u32)DSCR_CMD0_ALWAYS, - tsize, devwidth, DEV_FLAGS_ANYUSE); + auide_init_dbdma_dev(&target_dev_tab, (u32)DSCR_CMD0_ALWAYS, tsize, + devwidth, DEV_FLAGS_ANYUSE, auide->regbase); auide->target_dev_id = au1xxx_ddma_add_device(&target_dev_tab); /* Get a channel for TX */ @@ -411,14 +413,12 @@ static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d) #endif /* setup dev_tab for tx channel */ - auide_init_dbdma_dev( &source_dev_tab, - (u32)DSCR_CMD0_ALWAYS, - 8, 32, DEV_FLAGS_OUT | flags); + auide_init_dbdma_dev(&source_dev_tab, (u32)DSCR_CMD0_ALWAYS, 8, 32, + DEV_FLAGS_OUT | flags, auide->regbase); auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab ); - auide_init_dbdma_dev( &source_dev_tab, - (u32)DSCR_CMD0_ALWAYS, - 8, 32, DEV_FLAGS_IN | flags); + auide_init_dbdma_dev(&source_dev_tab, (u32)DSCR_CMD0_ALWAYS, 8, 32, + DEV_FLAGS_IN | flags, auide->regbase); auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab ); /* Get a channel for TX */ @@ -540,6 +540,14 @@ static int au_ide_probe(struct platform_device *dev) goto out; } + res = platform_get_resource(dev, IORESOURCE_DMA, 0); + if (!res) { + pr_debug("%s: no DDMA ID resource\n", DRV_NAME); + ret = -ENODEV; + goto out; + } + ahwif->ddma_id = res->start; + memset(&hw, 0, sizeof(hw)); auide_setup_ports(&hw, ahwif); hw.irq = ahwif->irq; |