diff options
| author | Chew, Chiau Ee <chiau.ee.chew@intel.com> | 2014-03-07 22:12:50 +0800 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2014-03-10 16:17:47 +0100 |
| commit | ceccd298f6fd537457576017d604fc5aa6d3c82a (patch) | |
| tree | ba525fb7f0c9b5fdef04fa9dc79823afa0fc49a9 /drivers/i2c | |
| parent | 0977f27338777fab04e20f769b869bc7726ab0ac (diff) | |
| download | op-kernel-dev-ceccd298f6fd537457576017d604fc5aa6d3c82a.zip op-kernel-dev-ceccd298f6fd537457576017d604fc5aa6d3c82a.tar.gz | |
i2c: designware-pci: add 10-bit addressing mode functionality for BYT I2C
All the I2C controllers on Intel BayTrail LPSS subsystem able
to support 10-bit addressing mode functionality.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Ong, Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c')
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-pcidrv.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 80c3b5e..094509bc 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -64,12 +64,19 @@ struct dw_pci_controller { u32 tx_fifo_depth; u32 rx_fifo_depth; u32 clk_khz; + u32 functionality; }; #define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \ DW_IC_CON_SLAVE_DISABLE | \ DW_IC_CON_RESTART_EN) +#define DW_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C | \ + I2C_FUNC_SMBUS_BYTE | \ + I2C_FUNC_SMBUS_BYTE_DATA | \ + I2C_FUNC_SMBUS_WORD_DATA | \ + I2C_FUNC_SMBUS_I2C_BLOCK) + static struct dw_pci_controller dw_pci_controllers[] = { [moorestown_0] = { .bus_num = 0, @@ -140,6 +147,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { .tx_fifo_depth = 32, .rx_fifo_depth = 32, .clk_khz = 100000, + .functionality = I2C_FUNC_10BIT_ADDR, }, }; static struct i2c_algorithm i2c_dw_algo = { @@ -212,12 +220,9 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; dev->base = pcim_iomap_table(pdev)[0]; dev->dev = &pdev->dev; - dev->functionality = - I2C_FUNC_I2C | - I2C_FUNC_SMBUS_BYTE | - I2C_FUNC_SMBUS_BYTE_DATA | - I2C_FUNC_SMBUS_WORD_DATA | - I2C_FUNC_SMBUS_I2C_BLOCK; + dev->functionality = controller->functionality | + DW_DEFAULT_FUNCTIONALITY; + dev->master_cfg = controller->bus_cfg; pci_set_drvdata(pdev, dev); |
