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authorXiangliang Yu <Xiangliang.Yu@amd.com>2015-12-11 20:02:53 +0800
committerWolfram Sang <wsa@the-dreams.de>2015-12-12 18:00:16 +0100
commit2d244c81481fa5142a2ba6656ab7a8e40c849c27 (patch)
treefebadcdd309a628e2f002b31bb8bbc667704d1a0 /drivers/i2c/busses/i2c-designware-core.c
parent5212f9ae519a3e108205f27eb22929266e688e3e (diff)
downloadop-kernel-dev-2d244c81481fa5142a2ba6656ab7a8e40c849c27.zip
op-kernel-dev-2d244c81481fa5142a2ba6656ab7a8e40c849c27.tar.gz
i2c: designware: fix IO timeout issue for AMD controller
Because of some hardware limitation, AMD I2C controller can't trigger pending interrupt if interrupt status has been changed after clearing interrupt status bits. Then, I2C will lost interrupt and IO timeout. According to hardware design, this patch implements a workaround to disable i2c controller interrupt and re-enable i2c interrupt before exiting ISR. To reduce the performance impacts on other vendors, use unlikely function to check flag in ISR. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
Diffstat (limited to 'drivers/i2c/busses/i2c-designware-core.c')
-rw-r--r--drivers/i2c/busses/i2c-designware-core.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index 8c48b27..de7fbbb 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -813,6 +813,12 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id)
tx_aborted:
if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err)
complete(&dev->cmd_complete);
+ else if (unlikely(dev->accessor_flags & ACCESS_INTR_MASK)) {
+ /* workaround to trigger pending interrupt */
+ stat = dw_readl(dev, DW_IC_INTR_MASK);
+ i2c_dw_disable_int(dev);
+ dw_writel(dev, stat, DW_IC_INTR_MASK);
+ }
return IRQ_HANDLED;
}
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