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authorMarek Vasut <marex@denx.de>2013-10-06 14:02:13 +0200
committerWolfram Sang <wsa@the-dreams.de>2013-10-06 15:56:26 +0200
commit29faeb388a1af5c2175e79ce52173c45a262924a (patch)
treeb4dc6bc55f6961e004dbf93e6a2ce820be41b3a9 /drivers/hwmon/g760a.c
parent616228a164d4366f82d983c4a70d8006d9fb43f2 (diff)
downloadop-kernel-dev-29faeb388a1af5c2175e79ce52173c45a262924a.zip
op-kernel-dev-29faeb388a1af5c2175e79ce52173c45a262924a.tar.gz
i2c: mxs: Rework the PIO mode operation
Analyze and rework the PIO mode operation. The PIO mode operation was unreliable on MX28, by analyzing the bus with LA, the checks for when data were available or were to be sent were wrong. The PIO WRITE has to be completely reworked as it multiple problems. The MX23 datasheet helped here, see comments in the code for details. The problems boil down to: - RUN bit in CTRL0 must be set after DATA register was written - The PIO transfer must be 4 bytes long tops, otherwise use clock stretching. Both of these fixes are implemented. The PIO READ operation can only be done for up to four bytes as we are unable to read out the data from the DATA register fast enough. This patch also tries to document the investigation within the code. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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