Merge branch 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/gpio

Linus Walleij <linus.walleij@linaro.org> writes:

 This is a pull request for the GPIO and pin control stuff
 accumulated in the ST-Ericsson tree. Here we have:

 - Improvements and fixes and a custom pin config API from
   Rabin Vincent

 - Device Tree bindings from Lee Jones

 - Some accumulated patches by yours truly.

 - A MSP platform data init patch from Ola Lilja that is merged
   here due to dependency on pin config work. It is to be
   used with work being worked on in parallel in the ALSA
   SoC subsystem.

 If you wonder about the custom pin config implementation this
 is to be used as a transition base as I am rewriting the
 driver to use pinctrl. Expect a final pull request on top
 of this one that will move the ux500 over to pinctrl.

* 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: Add support for MSP I2S-devices
  drivers/gpio: gpio-nomadik: Add support for irqdomains
  drivers/gpio: gpio-nomadik: Apply Device Tree bindings
  ARM: ux500: update pin handling
  ARM: ux500: implement pin API
  ARM: ux500: remove a bunch of internal pull-ups
  plat-nomadik: new sleep mode pincfg macros
  gpio/nomadik: use ioremap() instead of static mappings
  gpio/nomadik: support low EMI mode
  gpio/nomadik: fix spurious interrupts with SKE
  gpio/nomadik: cache [rf]w?imsc
  gpio/nomadik: don't set SLPM to 1 for non-wakeup pins

Also includes an update to v3.4-rc4.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 39 insertions, 0 deletions

diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
index b7494af..37a8fc9 100644
--- a/drivers/hwmon/fam15h_power.c
+++ b/drivers/hwmon/fam15h_power.c
@@ -122,6 +122,38 @@ static bool __devinit fam15h_power_is_internal_node0(struct pci_dev *f4)
 	return true;
 }
 
+/*
+ * Newer BKDG versions have an updated recommendation on how to properly
+ * initialize the running average range (was: 0xE, now: 0x9). This avoids
+ * counter saturations resulting in bogus power readings.
+ * We correct this value ourselves to cope with older BIOSes.
+ */
+static void __devinit tweak_runavg_range(struct pci_dev *pdev)
+{
+	u32 val;
+	const struct pci_device_id affected_device = {
+		PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) };
+
+	/*
+	 * let this quirk apply only to the current version of the
+	 * northbridge, since future versions may change the behavior
+	 */
+	if (!pci_match_id(&affected_device, pdev))
+		return;
+
+	pci_bus_read_config_dword(pdev->bus,
+		PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
+		REG_TDP_RUNNING_AVERAGE, &val);
+	if ((val & 0xf) != 0xe)
+		return;
+
+	val &= ~0xf;
+	val |=  0x9;
+	pci_bus_write_config_dword(pdev->bus,
+		PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
+		REG_TDP_RUNNING_AVERAGE, val);
+}
+
 static void __devinit fam15h_power_init_data(struct pci_dev *f4,
 					     struct fam15h_power_data *data)
 {
@@ -155,6 +187,13 @@ static int __devinit fam15h_power_probe(struct pci_dev *pdev,
 	struct device *dev;
 	int err;
 
+	/*
+	 * though we ignore every other northbridge, we still have to
+	 * do the tweaking on _each_ node in MCM processors as the counters
+	 * are working hand-in-hand
+	 */
+	tweak_runavg_range(pdev);
+
 	if (!fam15h_power_is_internal_node0(pdev)) {
 		err = -ENODEV;
 		goto exit;