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author | Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2016-08-07 02:25:35 -0700 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2016-08-17 11:13:07 +0200 |
commit | ae02e5d40d5f829c589412c6253f925e35cf7a22 (patch) | |
tree | 602344892039bff5ad5479faa3155081369455f9 /drivers/hid/intel-ish-hid/ipc/hw-ish.h | |
parent | 3703f53b99e4a7c373ce3568dd3f91f175ebb626 (diff) | |
download | op-kernel-dev-ae02e5d40d5f829c589412c6253f925e35cf7a22.zip op-kernel-dev-ae02e5d40d5f829c589412c6253f925e35cf7a22.tar.gz |
HID: intel-ish-hid: ipc layer
This layer is responsible for
- Enumerating over PCI bus
- Inform FW about host readiness
- Provide HW interface to transport layer for control and messages
- Interrupt handling and routing
Original-author: Daniel Drubin <daniel.drubin@intel.com>
Reviewed-and-tested-by: Ooi, Joyce <joyce.ooi@intel.com>
Tested-by: Grant Likely <grant.likely@secretlab.ca>
Tested-by: Rann Bar-On <rb6@duke.edu>
Tested-by: Atri Bhattacharya <badshah400@aim.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/hid/intel-ish-hid/ipc/hw-ish.h')
-rw-r--r-- | drivers/hid/intel-ish-hid/ipc/hw-ish.h | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/drivers/hid/intel-ish-hid/ipc/hw-ish.h b/drivers/hid/intel-ish-hid/ipc/hw-ish.h new file mode 100644 index 0000000..46615a0 --- /dev/null +++ b/drivers/hid/intel-ish-hid/ipc/hw-ish.h @@ -0,0 +1,71 @@ +/* + * H/W layer of ISHTP provider device (ISH) + * + * Copyright (c) 2014-2016, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef _ISHTP_HW_ISH_H_ +#define _ISHTP_HW_ISH_H_ + +#include <linux/pci.h> +#include <linux/interrupt.h> +#include "hw-ish-regs.h" +#include "ishtp-dev.h" + +#define CHV_DEVICE_ID 0x22D8 +#define BXT_Ax_DEVICE_ID 0x0AA2 +#define BXT_Bx_DEVICE_ID 0x1AA2 +#define APL_Ax_DEVICE_ID 0x5AA2 +#define SPT_Ax_DEVICE_ID 0x9D35 + +#define REVISION_ID_CHT_A0 0x6 +#define REVISION_ID_CHT_Ax_SI 0x0 +#define REVISION_ID_CHT_Bx_SI 0x10 +#define REVISION_ID_CHT_Kx_SI 0x20 +#define REVISION_ID_CHT_Dx_SI 0x30 +#define REVISION_ID_CHT_B0 0xB0 +#define REVISION_ID_SI_MASK 0x70 + +struct ipc_rst_payload_type { + uint16_t reset_id; + uint16_t reserved; +}; + +struct time_sync_format { + uint8_t ts1_source; + uint8_t ts2_source; + uint16_t reserved; +} __packed; + +struct ipc_time_update_msg { + uint64_t primary_host_time; + struct time_sync_format sync_info; + uint64_t secondary_host_time; +} __packed; + +enum { + HOST_UTC_TIME_USEC = 0, + HOST_SYSTEM_TIME_USEC = 1 +}; + +struct ish_hw { + void __iomem *mem_addr; +}; + +#define to_ish_hw(dev) (struct ish_hw *)((dev)->hw) + +irqreturn_t ish_irq_handler(int irq, void *dev_id); +struct ishtp_device *ish_dev_init(struct pci_dev *pdev); +int ish_hw_start(struct ishtp_device *dev); +void ish_device_disable(struct ishtp_device *dev); + +#endif /* _ISHTP_HW_ISH_H_ */ |